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Physics & Astronomy HEP Electronics

Physics & Astronomy HEP Electronics. TIM Interface to TTC. ATLAS SCT/Pixel TIM FDR/PRR 28 June 2004. John Lane Martin Postranecky, Matt Warren. TTC signals. TIM TTC Registers. Access Data, address and control for TTCrx I2C protocol Status TTCrx signals: commands, strobes, status bits

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Physics & Astronomy HEP Electronics

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  1. Physics & AstronomyHEP Electronics TIM Interface to TTC ATLAS SCT/Pixel TIM FDR/PRR 28 June 2004 John LaneMartin Postranecky, Matt Warren TIM Interface to TTC - John Lane

  2. TTC signals TIM Interface to TTC - John Lane

  3. TIM TTC Registers • Access • Data, address and control for TTCrx I2C protocol • Status • TTCrx signals: commands, strobes, status bits • BCID • TTCrx Bunch Crossing number • Data • TTCrx long-format data and sub-address • Select • Select long-format Data Qualifier TIM Interface to TTC - John Lane

  4. BCID offset TIM sends to ROD the ATLAS-wide BCID value, for sending on to ROB BCR is sent to ROD early by N clock periods, because its front-end protocol is N+1 bits long (instead of 1 bit). For SCT N=6, for Pixel N=8 TIM Interface to TTC - John Lane

  5. BCR BCR_FE 6 clock periods ORBIT -6 -5 -4 -3 -2 -1 0 1 2 3 L1A L1A_FE BCID story Consider BCR on bunch 0 and L1A on bunch 1: CTP sees 1 clock period but SCT must see 7 clocks separation Latencies neglected BCID values: ATLAS = 1 TTC = 7 TIM = 1 FE = 3 TIM Interface to TTC - John Lane

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