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High-Level Synthesis-II

High-Level Synthesis-II. Virendra Singh Indian Institute of Science Bangalore virendra@computer.org. IEP on Digital System Synthesis @ IIT Kanpur. Architectural Synthesis. Architectural Level Abstraction Datapath Controller Architectural Synthesis

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High-Level Synthesis-II

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  1. High-Level Synthesis-II Virendra Singh Indian Institute of Science Bangalore virendra@computer.org IEP on Digital System Synthesis @ IIT Kanpur

  2. Architectural Synthesis • Architectural Level Abstraction • Datapath • Controller • Architectural Synthesis • Constructing the macroscopic structure of a digital circuit starting from behavioural models that can be captured from Data flow or Sequencing Graph HLS@iitk

  3. Architectural Synthesis • Objective • Area • Cycle time • Latency • Throughput • Worst case bound • Evaluation • Architectural Exploration HLS@iitk

  4. Architectural Synthesis • Architectural synthesis tool can select an appropriate design point according to some user specific criterion and construct corresponding user specific Datapath and Controller • Circuit Specification for Architectural Synthesis • Behavioural circuit model • Details about resources being used and constraints • Capture by Sequencing Graph HLS@iitk

  5. Architectural Synthesis • Resources • Functional Resources • Primitive Resources • Application Specific Resources • Memory Resources • Interface Resources HLS@iitk

  6. Architectural Synthesis • Circuit Specification • Sequencing Graph • A set of functional resources, fully characterized in terms of area and execution delay • A set of constraints HLS@iitk

  7. Architectural Synthesis Computation: Differential Equation Solver xl = x + dx ul = u – (3*x*u*dx) – (3*y*dx) c = xl < a Data Flow Graph (DFG): represent operation and data dependencies HLS@iitk

  8. Data Flow Graph y x u 3 dx u x dx dx 3 1 2 * 6 * * 8 + 10 * a dx y xl * 7 * + 9 < 3 11 u c - 4 yl - 5 ul HLS@iitk

  9. Sequencing Graph NOP 1 2 * 6 * * 8 + 10 * * 7 * + 9 < 3 11 - 4 - 5 NOP HLS@iitk

  10. Hierarchical Sequencing Graph a.0 NOP a.1 * + a.2 b.0 a.4 a.3 NOP CALL * b.2 b.1 + * a.n NOP b.n NOP HLS@iitk

  11. Architectural Synthesis • Architectural Synthesis and optimization consistes of two stages • Placing the operation in time and in space, i.e., determining their time interval of execution and binding to resources • Determining detailed interconnection of the datapath and the logic-level specifications of the control unit HLS@iitk

  12. Temporal Domain: Scheduling Delay D = {di; i = 0,1, 2, ….. n} Start time T ={ti; i= 0, 1, …., n) Scheduling: Task of determining the start timing, subject to preceding constraints specified by sequencing graph Latency λ = tn – t0 HLS@iitk

  13. Temporal Domain: Scheduling • A scheduled sequencing graph is a vertex-weighted sequencing graph, where each vertex is labeled by its start time • OperationStart time • V1,V2, v6,v8, v10 1 • V3, v7, v9,v11 2 • V4 3 • V5 4 • Chaining HLS@iitk

  14. Temporal Domain: Scheduling NOP 1 2 * 6 * * 8 + 10 * TIME 1 * 7 * + 9 < 3 11 TIME 2 - 4 TIME 3 - 5 TIME 4 NOP HLS@iitk

  15. Temporal Domain: Scheduling NOP * 1 + 10 TIME 1 * 2 11 < TIME 2 3 * TIME 3 * 6 - 4 TIME 4 7 * TIME 5 8 - * 5 TIME 6 TIME 7 + 9 NOP HLS@iitk

  16. Spatial Domain: Binding • A fundamental concept that relates operation to resources is binding • Resource types • Resource sharing • Simple case of binding is a dedicated resources HLS@iitk

  17. Spatial Domain: Binding β(v1) = (1,1) β(v2) = (1,2) β(v3) = (1,3) β(v4) = (2,1) β(v5) = (2,2) .. HLS@iitk

  18. Spatial Domain: Binding NOP 1 2 * 6 * * 8 + 10 * TIME 1 * 7 * + 9 < 3 11 TIME 2 - 4 TIME 3 - 5 TIME 4 NOP HLS@iitk

  19. Spatial Domain: Binding A necessary condition for resource binding to produce a valid circuit implementation is that operation corresponding to the shared resource do not execute concurrently A resource binding can be represented by a labeled hyper-graph, where the vertex set V represents operations and the edge set Eβ represents the binding of the operation to the resources HLS@iitk

  20. Spatial Domain: Binding NOP (2,2) (1,1) (1,2) (1,3) (1,4) 1 2 * 6 * * 8 + 10 * TIME 1 * 7 * + 9 < 3 11 TIME 2 (2,1) - 4 TIME 3 - 5 TIME 4 NOP n HLS@iitk

  21. Spatial Domain: Binding 0 NOP 1 2 * 6 * + 10 * TIME 1 * 8 * 7 * < 3 11 TIME 2 9 + - 4 TIME 3 - 5 TIME 4 NOP n HLS@iitk

  22. Sequencing Graph NOP 1 2 * 6 * * 8 + 10 * * 7 * + 9 < 3 11 - 4 - 5 NOP HLS@iitk

  23. Hierarchical Sequencing Graph a.0 NOP (1,1) a.1 * + (2,1) a.2 b.0 a.4 NOP a.3 CALL * (1,2) b.2 b.1 + * a.n NOP b.n NOP HLS@iitk

  24. Synchronization 0 NOP a 1 * SYN 3 2 + + NOP n HLS@iitk

  25. Synchronization 0 0 NOP NOP a a 1 * SYN SYN * 1 3 2 3 + + 2 + + NOP n NOP n HLS@iitk

  26. Synchronization 0 NOP * 1 a SYN + 2 + 3 NOP n HLS@iitk

  27. Area/Performance Estimation Accurate area and performance estimation is not an easy task Schedule: provides latency Binding: provides information about the area HLS@iitk

  28. Retiming + + + Host δ δ δ δ HLS@iitk

  29. Retiming 7 7 7 0 0 0 Vg Vf Ve 0 Vh 0 0 0 0 Va 3 Vb Vc Vd 3 3 1 3 1 1 1 HLS@iitk

  30. Retiming 7 7 7 0 0 0 Vg Vf Ve 0 Vh 0 0 0 0 Va 3 Vb Vc Vd 1 1 1 1 3 3 3 Delay = 24 HLS@iitk

  31. Retiming 1 7 7 7 0 0 Vg Vf Ve 0 Vh 0 0 0 0 Va 3 Vb Vc Vd 3 3 1 3 1 0 1 HLS@iitk

  32. ASAP Scheduling NOP 1 2 * 6 * * 8 + 10 * TIME 1 * 7 * + 9 < 3 11 TIME 2 - 4 TIME 3 - 5 TIME 4 NOP HLS@iitk

  33. ASAP Scheduling ASAP(Gs(V,E)){ Schedule v0 by setting t0s = 1; repeat{ select vertex vi whose predecessors are all scheduled; schedule vi by setting tis = max{tjs+ dj} } untill (vn is scheduled) return ts } HLS@iitk

  34. ALAP Scheduling NOP 1 2 * * TIME 1 6 * * 3 TIME 2 + 7 * * 10 8 - 4 TIME 3 - + 9 < 11 5 TIME 4 NOP HLS@iitk

  35. Scheduling under Timing Constraints • Scheduling under latency constraints • Absolute constraints on start time • Relative constraints • Relative timing constraints are positive integers specified for some operation pair vi, vj • A minimum timing constraint lij≥ 0 requires tj≥ ti+lij • A maximum timing constraint uij≤ 0 requires tj ≤ ti+uij HLS@iitk

  36. Constraint Graph 0 NOP 3 Min Time 4 * 1 * Max Time 3 4 2 + + NOP n HLS@iitk

  37. NOP NOP 3 3 * * 1 1 * * 2 2 + + + + NOP NOP n n Constraint Graph 0 0 4 0 0 Min Time 4 Max Time 3 2 4 2 2 - 3 4 1 1 HLS@iitk

  38. Relative Scheduling • Scheduling under unbounded delay • The anchors of a constraint graph G(V,E) consists of the source vertex v0and all vertices with unbounded delay • Redundant anchor HLS@iitk

  39. 0 NOP a * SYN 2 + + NOP n Sequencing Graph 1 3 HLS@iitk

  40. Scheduling with Resource Constraint • Scheduling under resource constraints • computing area/latency trade-off points • Problems • Intractable problem • Area-performance trade-off points are affected by the other factors - non-resource dominated circuits HLS@iitk

  41. Scheduling with Resource Constraint • ILP Formulation • Binary decision variable X = {xil} • Start time of each operation is unique • Σl xil = 1 • 2. Sequencing relations represented by Gs(V,E) must be satisfied • Σl xil≥Σl xjl+ dj • 3.Resource bound must be met at every schedule step • ΣkΣmxim≤ ak HLS@iitk

  42. ILP Formulation All operation must start only once x0,1 = 1 x1,1 = 1 x2,1 = 1 x3,2 = 1 x4,3 = 1 x5,4 = 1 x6,1 + x6,2 = 1 x7,2 + x7,3 = 1 x8,1 + x8,2+x8,3 = 1 x9,2 + x9,3+x9,4 = 1 x10,1 + x10,2+x10,3 = 1 x11,2 + x11,3+x11,4 = 1 xn,5 = 1 HLS@iitk

  43. ILP Formulation Constraints – based on sequencing (more than one starting time for at least one operation) 2 x7,2 + 3 x7,3 – x6,1 – 2 x6,2 – 1 ≥0 2 x9,2 + 3 x9,3 + 4 x9,4 – x8,1 – 2 x8,2 – 3 x8,3 – 1 ≥0 2 x11,2 + 3 x11,3 + 4 x11,4 – x10,1 – 2 x10,2 – 3 x10,3 – 1 ≥ 0 4 x5,4 – 2 x7,2 – 3 x7,3 – 1 ≥0 5 xn,5 – 2 x9,2 – 3 x9,3 – 4 x9,4 – 1 ≥0 5 xn,5 – 2 x11,2 – 3 x11,3 – 4 x11,4 – 1 ≥ 0 HLS@iitk

  44. ILP Formulation Resource Constraints x1,1 + x2,2 + x6,1 + x8,1≤2 x3,2 + x6,2 + x7,2 + x8,2 ≤2 x7,3 + x8,3 ≤2 x10,1 ≤2 x9,2 + x10,2 + x11,2 ≤2 x4,3 + x9,3 + x10,3 + x11,3≤ 2 x5,4 + x9,4 +x11,4≤2 HLS@iitk

  45. ILP Formulation Optimize ΣiΣll.xil x6,1 + 2 x6,2 + 3 x7,2 + 3 x7,3 + x8,1 + 2 x8,2 + 3 x8,3 + 2 x9,2 + 3 x9,3 + 4 x9,4 + x10,1 + 2 x10,2 + 3 x10,3 + 2 x11,2 + 3 x11,3 + 4 x11,4 HLS@iitk

  46. Resource Sharing Resource sharing: Assignment of resource to more than one operation Goal: Reduce area Resource binding: explicit definition of mapping between resources and operation Binding may imply some resources are shared HLS@iitk

  47. Optimum Schedulingunder Resource Constraint NOP 1 2 + * 10 * TIME 1 6 * 11 * < 3 TIME 2 7 * * 8 - 4 TIME 3 - + 9 5 TIME 4 NOP HLS@iitk

  48. Scheduled Sequencing Graph NOP 1 2 + * * 10 TIME 1 6 * * < 11 3 TIME 2 7 * * 8 - 4 TIME 3 - + 9 5 TIME 4 NOP HLS@iitk

  49. Compatibility Graph 9 3 1 8 10 4 5 11 7 6 2 HLS@iitk

  50. Conflict Graph 9 3 1 8 10 4 5 11 7 6 2 HLS@iitk

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