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Chapter 3:

Chapter 3:. 22444 - Computer Architecture & Organization (1). Arithmetic For Computers. Signed Number Representations. Sign-Magnitude Example : + 5 = – 5 = Range: 2’s Complement Example : + 5 = – 5 =. –7 ≤ N ≤ +7. –(2 n –1 –1) ≤ N ≤ +( 2 n –1 –1). S Magnitude. 0 Magnitude.

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Chapter 3:

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  1. Chapter 3: 22444 - Computer Architecture & Organization (1) Arithmetic For Computers

  2. Signed Number Representations • Sign-Magnitude Example: + 5 = – 5 = Range: • 2’s Complement Example: + 5 = – 5 = –7 ≤ N ≤ +7 –(2n –1 –1) ≤ N ≤ +(2n –1 –1) SMagnitude 0Magnitude 12’s Complement

  3. Signed Number Representations • 2’s Complement Range: Exercise: Calculate the range for 8 bits 8 Combinations –(2n –1) ≤ N ≤ +(2n –1 –1) 8 Combinations

  4. 2’s Complement System • Used to represent integers, both positive & negative • Distinguish: “2’s Comp. System” from “2’s Comp. Operation” Example: Represent the number +5 in 2’s Comp. System Correct: Incorrect: +5 = ( )2 +5 = ( )2 ( )2

  5. 2’s Complement System Example: Given a number represented in 2’s comp. system, write an algorithm to square it. Answer

  6. Addition • Bit-by-bit addition, with carry propagation. • Unsigned Binary Operands: • Produces unsigned binary • Possible overflow (Cy = 1) • Signed 2’s Comp. Operands: • Produces 2’s complement • Possible overflow Cy Cy-1 + . + . + .

  7. Subtraction • 2’s Complement Addition • Unsigned Binary Operands: • If Cy = 1, result is unsigned binary • If Cy = 0, result is negative (2’s comp) • No overflow • Signed 2’s Comp. Operands: • Produces 2’s complement • Possible overflow Cy Cy-1 –.  . + . – .  . + .

  8. Multiplication • Bit-by-bit Multiplication • Unsigned Binary Operands • Unsigned result • 2n-bit result from n × n bits operands • No overflow • Partial Sum ×. + . + . . + ... Partial Sum 0 1 1 0 × 0 1 0 1 0 1 1 0 0 0 0 0 . 0 1 1 0 . . 0 0 0 0 ... + 0 0 0 0 0 0 0 0 =

  9. Sequential Multiplication Multiplicand Multiplier 1 1 1 1 × 0 1 0 1 1 1 1 1 0 0 0 0 . 0 1 1 0 . . 0 0 0 0 ... 0 0 0 0 1 1 1 1 0 1 0 1 ALU Product Control Unit 0 0 0 0 0 0 0 0

  10. Sequential Multiplication Multiplicand Multiplier 1 1 1 1 ×0 1 0 1 1 1 1 1 0 0 0 0 . 1 1 1 1 . . 0 0 0 0 ... 0 0 0 0 1 1 1 1 0 1 0 1 1 Add ALU Product Control Unit Load 0 0 0 0 0 0 0 0

  11. Sequential Multiplication Multiplicand Multiplier 1 1 1 1 ×0 1 0 1 1 1 1 1 0 0 0 0 . 1 1 1 1 . . 0 0 0 0 ... Shift Left Shift Right 0 0 0 0 1 1 1 1 0 1 0 1 ALU Product Control Unit 0 0 0 0 1 1 1 1

  12. Sequential Multiplication Multiplicand Multiplier 1 1 1 1 ×0 1 0 1 1 1 1 1 0 0 0 0 . 1 1 1 1 . . 0 0 0 0 ... Shift Left Shift Right 0 0 0 11 1 1 0 0 0 1 0 0 ALU Product Control Unit 0 0 0 0 1 1 1 1

  13. Sequential Multiplication Multiplicand Multiplier 1 1 1 1 ×0 1 0 1 1 1 1 1 0 0 0 0 . 1 1 1 1 . . 0 0 0 0 ... Shift Left Shift Right 0 0 111 1 00 00 0 1 1 Add ALU Product Control Unit Load 0 0 0 0 1 1 1 1

  14. Sequential Multiplication Multiplicand Multiplier 1 1 1 1 × 0 1 0 1 1 1 1 1 0 0 0 0 . 1 1 1 1 . . 0 0 0 0 ... Shift Left Shift Right 0 1111 000 000 0 0 ALU Product Control Unit 0 1001 0 1 1

  15. Sequential Multiplication • Delay: Number of Clocks = . . . . Clocks Multiplicand Multiplier 1 1 1 1 ×0 1 0 1 1 1 1 1 0 0 0 0 . 1 1 1 1 . . 0 0 0 0 . .. 1 0 0 1 0 1 1 1111 0000 0000 ALU Product Control Unit 0 1001 0 1 1

  16. Sequential Multiplication • Delay: Number of Clocks = . . . . Clocks Multiplicand Multiplier 0000 M M M M m m m m ALU Product Control Unit 0 0 0 0 0 0 0 0 Clock

  17. Sequential Multiplication • Delay: Number of Clocks = . . . . Clocks Multiplicand Multiplier 000 M M M M0 0 m m m ALU Product Control Unit 0 0 0 0 p p p p Clock

  18. Sequential Multiplication • Delay: Number of Clocks = . . . . Clocks Multiplicand Multiplier 00M M M M 00 00 m m ALU Product Control Unit 0 0 p p p p p p Clock

  19. Sequential Multiplication • Delay: Number of Clocks = . . . . Clocks Multiplicand Multiplier 0M M M M 000 000 m ALU Product Control Unit 0 pp p p p p p Clock

  20. Sequential Multiplication • Delay: Number of Clocks = . . . . Clocks Multiplicand Multiplier M M M M 0000 0000 ALU Product Control Unit ppp p p p p p Clock

  21. Multiplication • ALU Size? 0 1 1 0 × 0 1 0 1 Partial Sum: 0 0 0 0 0 0 0 0 + 0 1 1 0 Partial Sum: 0 0 1 1 0 0 0 1 1 0 + 0 0 0 0 Partial Sum: 0 0 1 1 0 0 0 1 1 0 + 0 1 1 0 Partial Sum: 0 0 1 1 1 1 0

  22. Signed Multiplication • Signed 2’s Comp. Operands: • Convert negative operands to positive values • Perform unsigned multiplication • Negate the result if the two operands differ in sign

  23. Division • Subtract Divisor & Drop a Bit • Unsigned Binary Operands • Unsigned result • 2n-bit Dividend by n-bit divisor  n-bit quotient and n-bit remainder • Possible overflow (big quotient) • Divide by zero • Quotient ≥ 2n .. .│ 0 0 0 0 0 0 0 0 0

  24. Sequential Division .0 1 1 0 1 0 1 1 0│0 1 0 1 0 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 1 0 1 0 0 – 0 1 1 0 0 0 1 0 0 0 0 – 0 1 1 0 0 0 0 1 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 0 1 0 1 0 – 0 1 1 0 0 1 0 0 Divisor Quotient 0 1 1 0 0 0 0 0 0 0 0 0 ALU Control Unit 0 1 0 1 0 0 1 0 Remainder (Dividend)

  25. Sequential Division .0 1 1 0 1 0 1 1 0│0 1 0 1 0 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 1 0 1 0 0 – 0 1 1 0 0 0 1 0 0 0 0 – 0 1 1 0 0 0 0 1 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 0 1 0 1 0 – 0 1 1 0 0 1 0 0 Divisor Quotient 0 1 1 0 0 0 0 0 0 0 0 0 Subtract ALU Load Control Unit 0 1 0 1 0 0 1 0 Remainder (Dividend)

  26. Sequential Division . 0 1 1 0 1 0 1 1 0│0 1 0 1 0 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 1 0 1 0 0 – 0 1 1 0 0 0 1 0 0 0 0 – 0 1 1 0 0 0 0 1 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 0 1 0 1 0 – 0 1 1 0 0 1 0 0 Divisor Shift Right Quotient 0 1 1 0 0 0 0 0 0 0 0 0 0 Shift Left Add ALU Load Control Unit 1 1 1 1 0 0 1 0 Remainder

  27. Sequential Division . 0 1 1 0 1 0 1 1 0│0 1 0 1 0 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 1 0 1 0 0 – 0 1 1 0 0 0 1 0 0 0 0 – 0 1 1 0 0 0 0 1 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 0 1 0 1 0 – 0 1 1 0 0 1 0 0 Divisor Quotient 0 0 1 1 0 0 0 0 0 0 0 0 Subtract ALU Load Control Unit 0 1 0 1 0 0 1 0 Remainder

  28. Sequential Division . 0 1 1 0 1 0 1 1 0│0 1 0 1 0 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 1 0 1 0 0 – 0 1 1 0 0 0 1 0 0 0 0 – 0 1 1 0 0 0 0 1 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 0 1 0 1 0 – 0 1 1 0 0 1 0 0 Divisor Shift Right Quotient 0 0 1 1 0 0 0 0 0 0 0 0 1 Shift Left ALU Control Unit 00 1 0 0 0 1 0 Remainder

  29. Sequential Division . 0 1 1 0 1 0 1 1 0│0 1 0 1 0 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 1 0 1 0 0 – 0 1 1 0 0 0 1 0 0 0 0 – 0 1 1 0 0 0 0 1 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 0 1 0 1 0 – 0 1 1 0 0 1 0 0 Divisor Quotient 00 0 1 10 0 0 0 0 01 Subtract ALU Load Control Unit 00 1 0 0 0 1 0 Remainder

  30. Sequential Division . 0 1 1 0 1 0 1 1 0│0 1 0 1 0 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 1 0 1 0 0 – 0 1 1 0 0 0 1 0 0 0 0 – 0 1 1 0 0 0 0 1 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 0 1 0 1 0 – 0 1 1 0 0 1 0 0 Divisor Shift Right Quotient 00 0 1 10 0 0 0 0 01 1 Shift Left ALU Control Unit 000 0 1 0 1 0 Remainder

  31. Sequential Division . 0 1 1 0 1 0 1 1 0│0 1 0 1 0 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 1 0 1 0 0 – 0 1 1 0 0 0 1 0 0 0 0 – 0 1 1 0 0 0 0 1 0 1 0 – 0 1 1 00 + 0 1 1 0 0 0 1 0 1 0 – 0 1 1 0 0 1 0 0 Divisor Quotient 000 0 110 0 0 011 Subtract ALU Load Control Unit 000 0 1 0 1 0 Remainder

  32. Sequential Division . 0 1 1 0 1 0 1 1 0│0 1 0 1 0 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 1 0 1 0 0 – 0 1 1 0 0 0 1 0 0 0 0 – 0 1 1 0 0 0 0 1 0 1 0 – 0 1 1 00 + 0 1 1 00 0 1 0 1 0 – 0 1 1 0 0 1 0 0 Divisor Shift Right Quotient 000 0 110 0 0 011 0 Shift Left Add ALU Load Control Unit 000 1 1 1 1 0 Remainder

  33. Sequential Division . 0 1 1 0 1 0 1 1 0│0 1 0 1 0 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 1 0 1 0 0 – 0 1 1 0 0 0 1 0 0 0 0 – 0 1 1 0 0 0 0 1 0 1 0 – 0 1 1 00 + 0 1 1 00 1 0 1 0 – 0 1 1 0 0 1 0 0 Divisor Quotient 0000 0110 0110 Subtract ALU Load Control Unit 000 0 1 0 1 0 Remainder

  34. Sequential Division . 0 1 1 0 1 0 1 1 0│0 1 0 1 0 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 1 0 1 0 0 – 0 1 1 0 0 0 1 0 0 0 0 – 0 1 1 0 0 0 0 1 0 1 0 – 0 1 1 00 + 0 1 1 00 1 0 1 0 – 0 1 1 0 0 1 0 0 Divisor Shift Right Quotient 0000 0110 0110 1 Shift Left ALU Control Unit 0000 0 1 00 Remainder

  35. Sequential Division . 0 1 1 01 0 1 1 0│0 1 0 1 0 0 1 0 – 0 1 1 0 0 + 0 1 1 0 0 1 0 1 0 0 – 0 1 1 0 0 0 1 0 0 0 0 – 0 1 1 0 0 0 0 1 0 1 0 – 0 1 1 00 + 0 1 1 00 1 0 1 0 – 0 1 1 0 0 1 0 0 Divisor Quotient 00000 011 1101 ALU Control Unit 0000 0 1 00 Remainder How many times was the Divisor & Quotient shifted? How many clocks?

  36. Signed Division • Signed 2’s Comp. Operands: • Convert negative operands to positive values • Perform unsigned division • Negate the result (?) if the two operands differ in sign • Which result? Quotient or remainder or both? • Dividend = Quotient × Divisor + Remainder • Example: 16 ÷ 3 • Rule: Dividend & Remainder must have the same sign

  37. Floating Point • Scientific Notation Example: (10.5 × 10 – 7 is not good) • Normalized Scientific Notation Example: (0.105 × 10 – 5 is not good) • Binary Numbers Example: (0.0101 × 2 – 5 is not good) (Normalized) . × 10 . × 2

  38. Floating Point • Sign & Magnitude • Overflow:The exponent is too large to be represented • Underflow:The exponent is too small to be represented • Single & Double Precision ± ? S Exponent Fraction 32 bits ± . × 2

  39. IEEE 754 Floating Point Standard • Single Precision: • Biased Exponent 32 bits S Exponent Fraction 1 bit 8 bits 23 bits 255 0 • • • • • = 0111 1111 (biased by 127) • • + 0 256 –

  40. IEEE 754 Floating Point Standard • Implicit ‘1’ 1.01 × 2 0 Examples: 75 = – 0.75 = 0.0 = ? This bit is always 1 No need to store it, hence implicit S Exponent Fraction 0 1000 0101 0 0 1 0 1 1 0 • • • • 0 1 0111 1110 1 0 0 0 • • • • • • • 0 ( )2 – ( )2

  41. IEEE 754 Floating Point Standard • Reserved Bit Patterns • Zero: • ± Infinity: • Others like denormalized number and Not-a-Number 0 0000 0000 0 0 0 0 • • • • • • • 0 1111 1111 0 0 0 0 • • • • • • • 0

  42. Floating-Point Addition / Subtraction • Need to Align Decimal Points Example: Add 0.5 + 0.4375 Normalized Forms: Align Decimal Point: Perform Addition: Normalize Result: 0 0111 1110 0 0 0 • • • 0 0 0111 1101 1 1 0 • • • 0 0 0111 1110 1.0 0 0 • • 0 0 0111 1101 1.1 1 0 • • 0 0 0111 1110 0.1 1 1 • • 0 0 0111 1110 1.1 1 1 • • 0 0 0111 1110 1 1 1 • • • 0 0.5 = ( )2 = 0.4375 = ( )2 = × 2 –1 × 2 –1 0 0 × 2 –1 × 2 –1

  43. Floating-Point Multiplication • Need to Account for Biased Exponents Example: Multiply 0.5 × 0.4375 Normalized Forms: Multiply Fractions: Add Exponents: Sub Extra Bias: Round & Normalize: 0 0111 1110 0 0 0 • • • 0 0 0111 1101 1 1 0 • • • 0 0 0111 11101.0 0 0 • • 0 0 0111 1101 1.1 1 0 • • 0 0 0111 1101 1.1 1 0 • • 0 0 0111 1100 1 1 0 • • • 0 0.5 = ( )2 = 0.4375 = ( )2 = ×. + – .

  44. Chapter 3 The End

  45. Chapter 3 Exercise 1 • Determine the magnitude of (10001000)2 in:a) sign-magnitude and b) 2’s complement system • Determine if there was an overflow error in: unsigned int a, b; // Assume 8-bit registers a= (10001000) 2 ; b = a + a; • Show how the CPU computes b: int a, b; // Assume 8-bit registers a= (10001000) 2 ; b = a – a; • How many addition are done in (1001)2.

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