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Computer Architecture and Organization 55:035

Computer Architecture and Organization 55:035. Final Exam Review Spring 2011. General Information. 2 hour exam - open book, open notes Eight problems - No Verilog Similar to homework problems Final is comprehensive Review chapters 2, 6, & 7 covered by midterm exam

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Computer Architecture and Organization 55:035

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  1. Computer Architecture and Organization55:035 Final Exam Review Spring 2011

  2. General Information • 2 hour exam - open book, open notes • Eight problems - No Verilog • Similar to homework problems • Final is comprehensive • Review chapters 2, 6, & 7 covered by midterm exam • Chapters 4, 5, & 8 since midterm

  3. Chapter 2 – Machine Instructions & Programs • Information representation • 2’s complement negative numbers • Memory locations & addresses • Byte addressability • Big endian vs. little endian • Word alignment • Memory operations

  4. Chapter 2 (cont.) • Instructions and sequencing • Addressing modes • Assembly language • Basic I/O operations • Stacks and Queues • Subroutines

  5. Chapter 6 - Arithmetic • Signed number addition/subtraction • Fast adders: carry-lookahead, carry-select • Multiplication • Booth’s algorithm • Bit pair recoding • Carry-save addition of partial products • Integer division; restoring & nonrestoring • Floating point representation and operations

  6. Chapter 7 – Basic Processing Unit • Fundamental concepts • Register transfers • Instruction fetch and execution • Instruction types • Point-to-point vs. multiple bus organization • Hardware control • Micro-programmed control

  7. Chapter 4 – I/O Organization • Polled I/O • Memory mapped I/O vs. port mapped I/O • Interrupts • Direct Memory Access (DMA) • Bus Structures • Synchronous vs. asynchronous • Interface types • Serial vs. parallel

  8. Chapter 5 – Memory Systems • IC RAM Memories • Static vs. Dynamic • Storage cell organization • Internal chip organization • Basic read/write operations • Read Only Memories • ROM, PROM, EPROM, EEPROM, Flash • Memory Arrays

  9. Chapter 5 – Memory Systems (cont.) • Cache Memories • Organization and mapping functions • Replacement algorithms • Performance • Interleaving of main memory • Hit rate & miss penalty • Virtual Memories • Address translation • Block replacement

  10. Chapter 8 - Pipelining • Basic Concepts • Performance improvement • Structural Hazards • Multiple execution units • Data Hazards • Operand forwarding • Instruction reordering (handle via SW) • Instruction Hazards • Branches, branch prediction and inst. prefetch

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