Operating Systems for Reconfigurable Computing Systems

1. Operating Systems for Reconfigurable Computing Systems Xuequn(Robin) Li Instructor: Prof. Shawki Areibi School of Engineering University of Guelph Mar 30, 2004

2. Outline • Introduction • Tasks • Allocation • Partitioning • Placement • Routing • Case Study • Design Concepts • Implementation Concepts • Summary • References

3. Introduction • Reconfigurable Computing System • Tradeoff between ASIC (Performance) and General Processor (Flexibility) • Logic (FPGA) • Embedded Control • Computer based RC • Traditional OS • Device management • Process & resource management • Memory management • File management

4. OS for RCS • With the development of the reconfigurable computing systems, designers are looking towards multitasking reconfigurable computers • Multitasking an FPGA will require an OS to manage the loading, swapping and allocation of the tasks to the FPGA surface • As the status of the FPGA changes in time, the designs will have to be completed at run-time, and not statically compiled. • The partitioning, placement and routing need be handled by the OS.

5. History • 1996, G. Brebner first presented the description of hardware multitasking • 1999, Wigley discussed the services of OS for RCS, including devices partitioning, placement and routing • 2003,Herbert Walder proposed a Reconfigurable Hardware OS prototype • ……

6. Benefits • Speed up development cycles • Re-use tested and reliable codes and circuits • Increase portability • Recompilation/resynthesis • Ease system re-partitioning • Between different HW components or even between HW and SW components • Simplify debugging • Monitor and trigger facilities

7. Tasks of OS for RCS • General Tasks • Loader • Scheduler • Memory management • Circuit protection • I/O • Inter-process communication • Special Tasks • Allocation • Partitioning • Placement • Routing multiple circuits on one or more FPGA

8. Scheduling Algorithms • First-in-first-served algorithms • simple but not efficient • Genetic algorithms: Reduce the time delay in serving large number of tasks • Belong to the class of stochastic search methods • Other than operate on a single solution to the problem at hand, genetic algorithms operate on a population of solutions

9. Allocation in OS for RCS • Take the next application from the loader to be executed on the real surface and given minimum area requirement • Search the logic frame free list for an area contiguous set of frames which meet the area requirement • Determine where or if the free logic is available for the application

10. Allocation Algorithms • Compare the free space on the real FPGA surface with the total required area • If not enough, partition the application, with parts executing, and the others being held elsewhere on the real surface or on the virtual surface • Determine of there is an available free frame on the real FPGA surface • Once the frame has been found, the space will be marked; otherwise, OS will invoke the partitioning algorithms

11. Partitioning in OS for RCS • The process in which a large circuit is broken into smaller ones to fit onto available space on the FPGA • Increase the performance • Minimize communication between partitions

12. Partitioning in OS for RCS (contd) • Identify a rearrangement of the running task on the FPGA that free sufficient logic for the waiting task • Use a scheduler mechanism to minimize the delay in the execution time of the chosen tasks • The deterministic and bounded run time is important to avoid unpredictable time which would reduce the ability of OS

13. Partitioning Algorithms • Calculate the As Soon As Possible (ASAP) execution levels of each node • Use these levels to allocate the nodes to the desired partition until the partition reaches the user selected capacity • Invoke the placement algorithm and if the placement fails, the OS reduces the user selected capacity and attempts to re-partition and re-place the application.

14. Placement in OS for RCS • Determining where modules of the application partitions are located in logic partitions • Minimizing the area, routing delays and run time • After successful complete placement, the router will be invoked by OS 2 3 4 1 6 5

15. Placement Algorithms • Objective: Placing the connecting logic modules close to each other • Place the first node to the right of the parent • Place the second mode on top of the parent • Repeat until all modules have been placed; otherwise, re-allocate or reduce the number of logic modules

16. Routing in OS for RCS • Create an electrical connection between two logic modules by setting the appropriate routing switches • Routing must have a predicable time • All logic modules have been internally placed and routed

17. Routing Algorithms • Modeled on a simple rule-based router • Route all nearest neighbour connections • Handle those routes that are not nearest neighbour • Create a list for the detail of each route, so OS can easily rip up the fail routes or removed routes • If routing fails, OS restart to invoke allocation algorithm with different specifications

18. Case StudyAn OS for RCS Prototype • Design concepts that define basic abstractions & operating system services • Implement concepts on Xilinx technology, including a multitasking environment, memory management unit, and device drivers & triggers to connect external I/O

19. Design Concepts • Reconfigurable Surface Partitioning • OS frame • User area • Hardware Tasks • OS modules • Host CPU • FPGA

20. OS for RCS Benchmark • A set of benchmark applications to evaluate OS for RCS • Not available right now, but should include these quality metrics • Area overheads • Runtime overheads • Fragmentation • External fragmentation • Internal fragmentation

21. Implementation Concepts • Target technology and Platform • XESS XSV-800 as platform • A Virtex XCV-800 SRAM-based FPGA • A set of I/O devices: Ethernet, RS232,display elements, DAC etc. • FPGA Surface Partitioning • OS –frame • Task slots • Task Slots Placeholders for HW tasks • Width • STI (Standard task interface) • IFCC (Inter-frame communication channels)

22. XESS Prototyping Board

23. Example • Function: • Generate an artificial audio signal • Display light patterns on LED bar • Receive UDP (User Datagram Protocol ) packets via the Ethernet interface and forward to RS232 interface or the audio codec • Reply to incoming ARP (Address Resolution Protocol) and ICMP (Internet Control Message Protocol) echo requests

24. Summary • New technology • Future works • Larger FPGAs • Improved algorithms • More practicable Thanks !

25. References • [1] Operating System----A modern Perspective By Gary Nutt • [2] The Development of an Operating System for Reconfigurable computing By Grant Wigley, David Kearney Univ. of South Australia  • [3] Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations By Herbert Walder and Macor Platzner Swiss Federal Institute of Technology • [4] Reconfigurable Hardware OS Prototype By Herbert Walder and Macor Platzner Swiss Federal Institute of Technology

26. Questions ? ? ?