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ELECTRONICS Part II. EE 213. Course Content. Part I Introduction to Oscilloscope Measurements Introduction to Semiconductors Diode Applications Special-Purpose Diodes Bipolar Junction Transistors (BJTs) Bipolar Transistor Biasing. Course Content (cont’d). Part II

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Electronics part ii

ELECTRONICSPart II

EE 213

H. Chan; Mohawk College


Course content

Course Content

  • Part I

    • Introduction to Oscilloscope Measurements

    • Introduction to Semiconductors

    • Diode Applications

    • Special-Purpose Diodes

    • Bipolar Junction Transistors (BJTs)

    • Bipolar Transistor Biasing

H. Chan; Mohawk College


Course content cont d

Course Content (cont’d)

  • Part II

    • Small-Signal BJT Amplifiers

    • Power Amplifiers

    • Field-Effect Transistor Biasing

    • Small-Signal FET Amplifiers

    • Amplifier Frequency Response

    • Transistor Voltage Regulators

    • Introduction to Thyristors

H. Chan; Mohawk College


Intro to small signal amplifiers

Intro to Small-Signal Amplifiers

  • The Q-point of a transistor is set by dc biasing

  • Small-signal amplifiers are designed to handle small ac signals that cause relatively small variations about the Q-point.

  • Convention used for dc and ac values:

    • dc values, e.g. IE , RE

    • ac values, e.g. Ie (rms is assumed unless otherwise stated), Re , r’e (internal r of t’sistor)

    • instantaneous values, e.g. ie

H. Chan; Mohawk College


Basic small signal amplifier

Basic Small-Signal Amplifier

+VCC

Ic

ICQ

Vb

RC

R1

VBQ

C2

Ib

Rs

C1

IBQ

VCEQ

Vs

RL

RE

R2

Vce

C1 and C2 block dc voltage but pass ac signal.

H. Chan; Mohawk College


Small signal amplifier operation

Small-Signal Amplifier Operation

  • Coupling capacitors C1 and C2 prevent Rs and RL from changing the dc bias voltages

  • Vs causes Vb and Ib to vary slightly which in turn produces large variations in Ic due to b

  • As Ic increases, Vce decreases and vice versa

  • Thus, Vc (output to RL) is 180o out of phase with Vb

H. Chan; Mohawk College


Graphical picture

Graphical Picture

IBQ

IC

Ib

IB5

Ic

IB4

Q

IB3

ICQ

IB2

IB1

VCEQ

VCE

Vce

H. Chan; Mohawk College


H parameters

h Parameters

  • h (hybrid) parameters are typically specified on a manufacturer’s data sheet.

    • hi: input resistance; output shorted

    • hr : voltage feedback ratio, input open

    • hf : forward current gain; output shorted

    • ho : output conductance; input open

  • Each h parameter has a 2nd subscript letter to designate configuration, e.g. hfe, hfc, hfb

H. Chan; Mohawk College


Amplifier configurations

Amplifier Configurations

  • Common-emitter amplifier: emitter is connected to ground, input is applied to base, and output is on collector

  • Common-collector: collector is grounded, input is at base, and output is on emitter

  • Common-base: base is grounded, input is at emitter, and output is on collector

H. Chan; Mohawk College


H parameter ratios

h-parameter Ratios

Common-Emitter

Common-Base

Common-Collector

H. Chan; Mohawk College


H parameter equivalent circuit

h-parameter Equivalent Circuit

Iin

hi

Vin

Vout

hfIin

ho

hrVout

  • The above diagram is the general form of the h-parameter equivalent circuit for a BJT.

  • For the three different amplifier configurations, just add the appropriate second subscript letter.

H. Chan; Mohawk College


R parameters

r Parameters

  • The resistance, r, parameters are perhaps easier to work with

    • aac : ac alpha (Ic/Ie)

    • bac : ac beta (Ic/Ib)

    • re’ : ac emitter resistance

    • rb’ : ac base resistance

    • rc’ : ac collector resistance

Relationships of h and r

parameters:

aac = hfb ; bac = hfe

H. Chan; Mohawk College


R parameter equivalent circuits

r-Parameter Equivalent Circuits

C

C

C

aacIe

bacIb

aacIe

bacIb

rc’

rb’

B

B

B

re’

Ib

Ib

re’

re’ 25 mV/IE

Ie

E

E

E

Generalized r-parameter

equivalent circuit for BJT

Simplified r-parameter equivalent

circuit and symbol of BJT

H. Chan; Mohawk College


Difference between b ac and b dc

Difference between bac and bDC

IC

IC

ICQ

Q

DIC {

Q

IB

IB

{

0

IBQ

0

DIB

bDC = ICQ/IBQ

bac = DIC/DIB

bDC and bac values will generally not be identical and

they also vary with the Q-point chosen.

H. Chan; Mohawk College


Common emitter amplifier

Common-Emitter Amplifier

+VCC

C1 : for input coupling

C3 : for output coupling

RC

R1

Vout

C1

Vin

C3

RL

R2

RE

C2

C2 : for emitter bypass

H. Chan; Mohawk College


Dc analysis of ce amplifier

DC Analysis of CE Amplifier

+VCC

RC

If bDCRE = RIN(base) >> R2, then

R1

VC

VB

VE

VE = VB - VBE ;

R2

RE

VC = VCC - ICRC

H. Chan; Mohawk College


Ac analysis of ce amplifier

AC Analysis of CE Amplifier

Input and output resistance:

RC

Rin(tot) = R1//R2//Rin(base)

where Rin(base) = bacre’

ac

ground

C

Vout

Rout RC(not including RL)

bacIb

B

Voltage gain of CE amplifier:

Vin

re’

R1

R2

E

If RL is included: Rout = RC//RL,

and

C1, C2, and C3 are

replaced by shorts

assuming XC 0

H. Chan; Mohawk College


Overall voltage gain of ce amplifier

Overall Voltage Gain of CE Amplifier

Voltage gain without

emitter bypass

capacitor, C2 :

Rs

Vout

Vb

Vs

R1//R2

Rc

= RC//RL

Rule of thumb on

emitter bypass

capacitor:

XC2 RE/10

H. Chan; Mohawk College


Stability of voltage gain

Stability of Voltage Gain

+VCC

Bypassing RE produces max.

voltage gain but it is less stable

since re’ is dependent on IE and

temperature.

RC

C3

R1

C1

By choosing RE110 re’, the

the effect of re’ is minimized

without reducing the voltage

gain too much:

R2

RE1

Av -Rc/RE1

C2

RE2

Rin(base) = bac(re’+RE1)

Swamped

amplifier

H. Chan; Mohawk College


Current gain and power gain

Current Gain and Power Gain

Ic

Rs

Ib

Is

Vs

R1//R2

Rc

Base to collector current gain is bac but

overall current gain is Ai = Ic/Iswhere

Overall power gain is: Ap = Av’Ai

H. Chan; Mohawk College


Common collector amplifier

Common-Collector Amplifier

DC analysis:

+VCC

R1

VE = VB - VBE

C1

IE = VE / RE

Vin

C2

VC = VCC

Vout

The CC amplifier is also

known as an emitter-

follower since Vout follows

Vin in phase and voltage.

R2

RE

RL

H. Chan; Mohawk College


Ac analysis of cc amplifier

AC Analysis of CC Amplifier

aacIe

Iin

Vin

If Re >> re’, then, Av 1,

and Rin(base) bacRe

re’

R1//R2

Vout

Rin(tot) = R1//R2//Rin(base)

Ie

Rout (Rs/bac)//Re (very low)

Re= RE//RL

Ai = Ie/Iin

 bac(if R1//R2>> bacRe)

Vin = Ie(re’ + Re)

Vout = IeRe

Ap = AvAi Ai

H. Chan; Mohawk College


Darlington pair

Darlington Pair

+VCC

  • Ie2bac2Ie1 bac1bac2Ie1

  • So,bac(overall) = bac1bac2

  • Assuming re’ << RE, Rin = bac1bac2RE

  • Darlington pair has very high current gain, very high Rin, and very low Rout - ideal as a buffer

Ib1

bac1

bac2

Ie1

Ie2

RE

H. Chan; Mohawk College


Common base amplifier

Common-Base Amplifier

+VCC

CB amplifier provides

high Av with a max. Ai

of 1.

RC

R1

Vout

C2

There is no phase

inversion between

Vout and Vin.

C3

C1

RL

DC formulas are

identical to those

for CE amplifier.

Vin

R2

RE

H. Chan; Mohawk College


Ac analysis of cb amplifier

AC Analysis of CB Amplifier

Vout

Ic

Rc

Rin(emitter) = re’//RE

B

re’

If RE >> re’, then

Vin

E

Rin(emitter) = re’

RE

Rout Rc

Ai 1; and Ap  Av

H. Chan; Mohawk College


Comparing ce cc cb amplifiers

Comparing CE, CC, & CB Amplifiers

H. Chan; Mohawk College


Multistage amplifiers

Multistage Amplifiers

Av1

Av2

Av3

Avn

Vout

Vin

n amplifier stages in cascade

  • Overall voltage gain, AvT = Av1Av2Av3 . . . Avn = Vout/Vin

  • Overall gain in dB, AvT(dB) = Av1(dB)+Av2(dB) + . . . +Avn(dB)where, Av(dB) = 20 log Av

  • The purpose of a multistage arrangement is to increase the overall voltage gain.

H. Chan; Mohawk College


Two stage ce amplifier

Two-stage CE Amplifier

+VCC

R3

R7

R1

R5

C5

C3

C1

Vout

Vin

Q2

Q1

R2

R4

C2

R6

R8

C4

Capacitive coupling prevents change in dc bias

H. Chan; Mohawk College


Analysis of 2 stage ce amplifier

Analysis of 2-stage CE Amplifier

DC Analysis:

VB, VE, VC and IC are

identical to those

for 1-stage CE ampl.

Vin

R1//R2

R3

R5//R6

Rin(base2)

AC Analysis:

Rc1 = R3//R5//R6//Rin(base2) ;

AvT = Av1Av2

H. Chan; Mohawk College


2 stage direct coupled amplifier

2-stage Direct-Coupled Amplifier

+VCC

R5

R3

R1

Vout

Vin

Q2

Q1

Note:

No coupling or

bypass capacitors

R6

R2

R4

H. Chan; Mohawk College


Notes on direct coupled amplifier

Notes on Direct-Coupled Amplifier

  • DC collector voltage of first stage provides base-bias voltage for second stage

  • Amplification down to 0 Hz is possible due to absence of capacitive reactances

  • Disadvantage - small changes in dc bias voltages due to temperature or power-supply variations are amplified by succeeding stages

H. Chan; Mohawk College


Transformer coupled multistage amplifier

Transformer-Coupled Multistage Amplifier

+VCC

R1

R3

T3

T2

T1

R4

R2

Vout

C5

Vin

C3

C1

Q2

Q1

R5

C2

R6

C4

H. Chan; Mohawk College


Notes on t former coupled amplifiers

Notes On T’former-Coupled Amplifiers

  • Transformer-coupling is often used in high-frequency amplifiers such as those in RF and IF sections of radio and TV receivers.

  • Transformer size is usually prohibitive at low frequencies such as audio.

  • Capacitors are usually connected across the primary windings of the transformers to obtain resonance and increase selectivity.

H. Chan; Mohawk College


Typical troubleshooting process

Typical Troubleshooting Process

  • Identify the symptom(s).

  • Perform a power check.

  • Perform a sensory check.

  • Apply a signal-tracing technique to isolate the fault to a single circuit.

  • Apply fault-analysis to isolate the fault further to a single component or group of components.

  • Use replacement or repair to fix the problem.

H. Chan; Mohawk College


Power amplifiers

Power Amplifiers

  • Power amplifiers are large-signal amplifiers

  • They are normally used as the final stage of a communications receiver or transmitter to provide signal power to speakers or to a transmitting antenna.

  • Four classes of large-signal amplifiers will be covered: class A, class B, class AB, and class C.

H. Chan; Mohawk College


Class a amplifier characteristics

Class A Amplifier Characteristics

  • Q-point is centred on ac load line.

  • Operates in linear region (i.e. no cutoff or saturation) for full 360o of input cycle.

  • Output voltage waveform has same shape as input waveform except amplified.

  • Can be either inverting or noninverting.

  • Maximum power efficiency is 25%.

H. Chan; Mohawk College


Class a operation dc load line

Class A Operation: DC Load Line

+VCC

IC(sat) occurs when VCE 0, so

RC

R1

VCE(cutoff) occurs

when IC 0, so

VCE(cutoff) VCC

Vout

C1

Vin

C3

IC

RL

R2

RE

IC(sat)

C2

Q

ICQ

VCE

VCEQ

VCC

H. Chan; Mohawk College


Class a operation ac load line

Class A Operation: AC Load Line

From Q-point to cutoff point:

DIc = ICQ ; DVce’ = ICQRc

Vce(cutof) = VCEQ + ICQRc

Vin

IC

R1//R2

Rc

Ic(sat)

DIc’

Q

Rc = RC//RL

ICQ

DVce’

From Q-point to saturation point:

DVce = VCEQ ; DIc’ = VCEQ/Rc

Ic(sat) = ICQ+DIc’ = ICQ + VCEQ/Rc

VCE

VCEQ

Vce(cutoff)

H. Chan; Mohawk College


Maximum class a operation

Maximum Class A Operation

IC

AC load line

Q-point is at centre

of ac load line for

max. voltage swing

with no clipping.

Ic(sat)

Q

ICQ

0

VCE

To centre Q-point:

VCEQ = ICQRc

Ic(sat) = 2ICQ

Vce(cutoff) = 2VCEQ

VCEQ

Vce(cutoff)

0

H. Chan; Mohawk College


Non linearity of r e

Non-linearity of re’

  • For large voltage swings, re’25mV/IE is not valid.

  • Instead, the average value of re’ = DVBE/DIC should be used for Av formula.

  • Non-linearity of re’ leads to distortion at output.

  • Reduce distortion by setting Q-point higher or use swamping resistor in the emitter.

IC

Q

VBE

H. Chan; Mohawk College


Power efficiency class a amplifier

Power & Efficiency: Class A Amplifier

  • Power gain, Ap = AiAvbDCRc/re’

  • Quiescent power, PDQ = ICQVCEQ

  • Output power, Pout = VceIc = Vout(rms)Iout(rms)

    • when Q-point is centred, Pout(max) = 0.5VCEQICQ

  • Efficiency, h = Pout/PDC = Pout/(VCCICQ)

  • When Q-point is centred, hmax = 0.25

  • Max. load power, PL(max) = 0.5(VCEQ)2/RL

H. Chan; Mohawk College


Class b amplifier characteristics

Class B Amplifier Characteristics

  • Biased at cutoff - it operates in the linear region for 180o and cutoff for 180o.

  • Class AB amplifier is biased to conduct slightly more than 180o.

  • Advantage of class B or class AB amplifier over class A amplifier - more efficient.

  • Disadvantage - more difficult to implement circuit for linear reproduction of input wave

H. Chan; Mohawk College


Push pull class b operation

Push-pull Class B Operation

+VCC

An npn transistor and a matched

pnp transistor form two emitter-

followers that turn on alternately.

Since there is no dc base bias, Q1

and Q2 will turn on only when |Vin|

is greater than VBE. This leads to

crossover distortion.

Q1

Vout

Vin

Q2

RL

Q1 on

-VCC

Vout

t

Complementary amplifier

Q2 on

H. Chan; Mohawk College


Class ab operation

Class AB Operation

+VCC

  • The push-pull circuit is biased slightly above cutoff to eliminate crossover distortion.

  • D1 and D2 have closely matched transconductance characteristics ofthe transistors to maintain a stable bias.

  • C3 eliminates need for dual-polarity supplies.

R1

C1

Q1

D1

C3

Vin

D2

RL

Q2

C2

R2

H. Chan; Mohawk College


Class ab amplifier dc analysis

Class AB Amplifier: DC Analysis

+VCC

  • Pick R1 = R2, therefore VA=VCC/2

  • Assuming transconductance characteristics of diodes and transistors are identical, VCEQ1=VCEQ2=VCC/2

  • ICQ 0 (cutoff)

R1

Q1

VCEQ1

D1

A

D2

Q2

VCEQ2

R2

H. Chan; Mohawk College


Class ab amplifier ac analysis

Class AB Amplifier: AC Analysis

IC

  • For max. output, Q1 and Q2 are alternately driven from near cutoff to near saturation.

  • Vce of both Q1 and Q2 swings from VCEQ = VCC/2 to 0.

  • Ic swings from 0 to Ic(sat) = VCEQ/RL Iout(pk)

  • Input resistance, Rin = bac(re’+RL)

Ic(sat)

ac load line

Ic

VCEQ

VCE

Vce

H. Chan; Mohawk College


Power efficiency class b amplifier

Power & Efficiency: Class B Amplifier

  • Average output power, Pout = Vout(rms)Iout(rms)

  • For max. output power, Vout(rms)= 0.707VCEQ and Iout(rms) = 0.707Ic(sat); therefore, Pout(max)=0.5VCEQIc(sat) = 0.25 VCCIc(sat)

  • Since each transistor draws current for a half-cycle, dc input power, PDC = VCCIc(sat)/p

  • Efficiency, hmax = Pout/PDC = 0.25p 0.79

  • The efficiency for class AB is slightly less.

H. Chan; Mohawk College


Darlington class ab amplifier

Darlington Class AB Amplifier

+VCC

In applications where

the load resistance is

low, Darlingtons are

used to increase input

resistance presented to

driving amplifier and

avoid reduction in Av.

4 diodes are required

to match the 4 base-

emitter junctions of the

darlington pairs.

R1

C1

Q2

D1

Q1

C3

Vin

D2

D3

D4

Q4

RL

Q3

C2

R2

H. Chan; Mohawk College


Class c amplifier characteristics

Class C Amplifier Characteristics

  • Biased below cutoff, i.e. it conducts less than 180o.

  • More efficient than class A, or push-pull class B and class AB.

  • Due to severe distortion of output waveform, class C amplifiers are limited to applications as tuned amplifiers at radio frequencies (RF).

H. Chan; Mohawk College


Basic class c operation

Basic Class C Operation

+VCC

Vin

VBB+VBE

RC

0

Vo

Vin

Ic

RB

0

tON

T

VBB

The transistor turns on when

Vin > VBB+VBE

Duty cycle = tON / T

H. Chan; Mohawk College


Tuned operation

Tuned Operation

+VCC

Ic

0

C1

L

Vout

C2

Vin

The short pulse of Ic initiates and sustains

the oscillation of the parallel resonant

circuit . The output sinewave has a pk-pk

amplitude of approximately 2VCC.

RB

VBB

H. Chan; Mohawk College


Power efficiency class c amplifier

Power & Efficiency: Class C Amplifier

  • Using simplification where current is IC(sat) and voltage is VCE(sat) at turn on, and assuming the entire load line is used, then

    PD(avg) = (tON/T)VCE(sat)IC(sat)

  • Max. output power for tuned operation,

    Pout(max) = (0.707V2CC) / Rc= 0.5 V2CC / Rc

  • Efficiency, h = Pout / (Pout + PD(avg) )

  • When Pout >> PD(avg) , h approaches 100%.

H. Chan; Mohawk College


Frequency multiplier

Frequency Multiplier

  • Frequency “doubling” is obtained by tuning tank circuit to second harmonic of input frequency.

  • By tuning tank circuit to higher harmonics, further frequency multiplication factors are achieved.

  • Amplitude of each alternate peak drops due to energy loss in circuit.

Ic

0

Vout

Output of tank circuit tuned

to 2nd harmonic frequency

H. Chan; Mohawk College


Junction field effect transistor

Junction Field-Effect Transistor

Drain

Drain

D

D

Gate

G

Gate

G

p

p

n

n

n

p

S

S

Symbol

Source

Symbol

Source

n-channel

p-channel

H. Chan; Mohawk College


Basic operation of jfet

Basic Operation of JFET

  • Depletion region in n-channel increases its resistance.

  • Channel width and channel resistance can be controlled by varying VGG (or VGS), thereby controlling drain current, ID.

ID

D

VDD

G

p

p

VGG

n

S

JFET is always operated

with VGG reverse-biased

H. Chan; Mohawk College


Jfet characteristics for v gs 0

JFET Characteristics For VGS=0

ID

RD

B

VGS = 0

C

IDSS

ID

Breakdown

+

VDS

VDD

Constant-current

region

+

_

VGS

_

A

0

VP (pinch-off voltage)

VDS

Between points A and B, IDa VDS - ohmic region.

IDSS - max. ID for a given JFET regardless of external circuit.

H. Chan; Mohawk College


Controlling i d with v gs

Controlling ID With VGS

ID

VGS = 0

RD

IDSS

VGS= -1V

ID

VDD

VGS= -2V

VGS= -3V

VGG

VGS= -4V

0

VP

VDS

VGS= VGS(off)

VGS(off) =cutoff voltage (i.e. ID = 0)

VGS(off) = -VP (where VP is measured at VGS = 0)

H. Chan; Mohawk College


Jfet transfer characteristics

JFET Transfer Characteristics

ID

Shockley’s equation:

IDSS

Forward transconductance:

VGS

VGS(off)

is value of gm at VGS = 0

0

Note: gm is max. at VGS = 0 and min. at VGS(off)

H. Chan; Mohawk College


Other jfet parameters

Other JFET Parameters

  • JFET’s input resistance, RIN = |VGS/IGSS| is very high since its gate-source junction is reverse-biased.

  • Input capacitance, Ciss is typically a few pF.

  • Output conducutance, gos, or output admittance, yos, is typically 10 mS, and is the inverse of drain-to-source resistance, r’ds = DVDS/DID

H. Chan; Mohawk College


Jfet with self biasing

JFET With Self-Biasing

+VDD

  • Large RG is required to prevent shorting of input signal to ground and to prevent loading on the driving stage.

  • VGS = -IDRS

  • VD = VDD - IDRD

  • VDS = VD - VS

    = VDD - ID(RD+RS)

RD

VG = 0

+

RG

IS

RS

_

H. Chan; Mohawk College


Setting q point of jfet

Setting Q-Point of JFET

  • First, determine ID for a desired value of VGS either by using transfer characteristic curve or Shockley’s equation.

  • Then calculate RS = |VGS/ID|

  • For midpoint bias (i.e. ID = 0.5 IDSS), make VGSVGS(off)/3.4

  • To set VD = 0.5 VDD , pick RD = VDD/(2ID)

H. Chan; Mohawk College


Graphical analysis of self biased jfet

Graphical Analysis of Self-Biased JFET

+VDD

  • First obtain transfer characteristic curve from data sheet or plot using Shockley’s equation.

  • Draw dc load line by starting with VGS = 0 when ID = 0, and then VGS = -IDSSRS when ID = IDSS.

ID

RD

IDSS

RG

RS

_

Q

VGS

VGS(off)

0

H. Chan; Mohawk College


Voltage divider bias

Voltage-Divider Bias

To keep the gate-source junction

reverse-biased, VS > VG

+VDD

VS = IDRS

RD

R1

ID

VG

VS

VS = VG - VGS

R2

RS

IS

H. Chan; Mohawk College


Graphical analysis of voltage divider biased jfet

Graphical Analysis of Voltage-Divider Biased JFET

ID

For ID = 0, VS = IDRS = 0, and

VGS = VG - VS = VG

IDSS

For VGS = 0,

Q

VG

RS

Draw the dc load line by

joining the two points and

extend it to intersect the

curve to get the Q-point.

VGS

0

VG

VGS(off)

H. Chan; Mohawk College


Q point stability

Q-Point Stability

  • The transfer characteristic of a JFET can differ considerably from one device to another of the same type.

  • This can cause a great variation of the Q-point, and consequently, ID and VGS.

  • With voltage-divider bias, the dependency of ID on the range of Q-points is reduced (i.e. more stable) because the slope is less than for self-bias, although VGS varies quite a bit for both circuits.

H. Chan; Mohawk College


Metal oxide semiconductor fet

Metal Oxide Semiconductor FET

  • The MOSFET differs from the JFET in that it has no pn junction structure.

  • The gate of the MOSFET is insulated from the channel by a silicon dioxide layer.

  • The two basic types of MOSFETs are depletion (D) and enhancement (E).

  • Because of the insulated gate, these devices are sometimes called IGFETs.

H. Chan; Mohawk College


Depletion mosfet

Depletion MOSFET

Drain

  • n-channel D-MOSFET is usually operated in the depletion mode with VGS < 0 and in the enhancement mode with VGS > 0.

  • p-channel D-MOSFET uses the opposite voltage polarity

D

SiO2

n

Gate

p

G

n

S

Channel

Symbol

Source

Basic structure of

n-channel D-MOSFET

H. Chan; Mohawk College


Depletion enhancement mosfet

Depletion/Enhancement MOSFET

  • Depletion Mode: negative gate voltage applied to n channel depletes channel of electrons, thus increasing its resistivity. At VGS(off), ID = 0, just like n-channel JFET.

  • Enhancement mode: when VGS > 0, electrons are attracted into channel, thus increasing (enhancing) the channel conductivity.

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Enhancement mosfet

Enhancement MOSFET

Drain

Induced

Channel

RD

D

SiO2

p

p

VDD

Gate

n

n

G

p

VGG

p

S

Symbol

Source

E-MOSFET construction and operation ( p-channel)

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Notes on e mosfet

Notes On E-MOSFET

  • The E-MOSFET operates onlyin the enhancement mode.

  • For a p-channel device, a negative gate voltage above a threshold value induces a channel by creating a layer of positive charges in the substrate region adjacent to the SiO2 layer.

  • Channel conductivity increases with VGS.

H. Chan; Mohawk College


Vmos tmos power mosfets

VMOS & TMOS Power MOSFETs

S

G

S

S

G

n+

n+

p

n+

n+

p

p

p

n-

n-

n+

n+

Channel

Channel

Channel

D

D

VMOS (V-groove MOSFET) creates a short and wide

induced channel to allow for higher currents and greater

power dissipation. Frequency response is also improved.

TMOS is similar to VMOS except it is easier to

manufacture

H. Chan; Mohawk College


D mosfet transfer characteristic

D-MOSFET Transfer Characteristic

ID

ID

n channel

p channel

IDSS

IDSS

VGS

VGS

0

0

VGS(off)

VGS(off)

D-MOSFET can operate with either +ve or -ve gate voltage.

Shockley’s equation for the JFET curve also applies to the

D-MOSFET curve.

H. Chan; Mohawk College


E mosfet transfer characteristic

E-MOSFET Transfer Characteristic

ID

ID

n channel

p channel

VGS

VGS

0

VGS(th)

0

VGS(th)

E-MOSFET uses only channel enhancement. Ideally ID = 0

until VGS > VGS(th). Transfer equation: ID = K(VGS - VGS(th))2,

where K depends on the particular MOSFET.

H. Chan; Mohawk College


Mosfet handling precautions

MOSFET Handling Precautions

  • All MOS devices are subject to damage from electrostatic discharge (ESD).

  • To avoid damage from ESD:

    • ship/store MOS devices in conductive foam

    • ground all instruments and metal benches

    • ground assembler’s/handler’s body via resistor

    • never remove MOS device from live circuit

    • do not apply signals while dc supply is off

H. Chan; Mohawk College


D mosfet with zero bias

D-MOSFET With Zero-Bias

  • Since VGS = 0, ID = IDSS.

  • VDS = VDD - IDSSRD

  • The value of RG is chosen arbitrarily large to prevent loading of the previous stage and isolate any ac input signal from ground.

+VDD

RD

ID

VG = 0

RG

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E or d mosfet bias

E- or D-MOSFET Bias

+VDD

+VDD

RD

R1

RG

RD

VDS = VDD - IDRD

Rs

ID = K(VGS - VGS(th))2

Drain-feedback bias

Voltage-divider bias

Since IG 0, VGS = VDS

H. Chan; Mohawk College


Small signal jfet amplifier

Small-Signal JFET Amplifier

+VDD

VGSQ

RD

C3

C1

Vout

Vin

VDSQ

RG

RL

RS

C2

Common-source amplifier

Voltage waveforms

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Jfet transfer characteristic curve

JFET Transfer Characteristic Curve

ID

  • As Vgs swings from its Q-point to a more -ve value, Id decreases from its Q-point.

  • When Vgs swings to a less -ve value, Id increases.

  • Similar diagrams can be drawn forMOSFETs.

IDSS

Id

Q

IDQ

VGS

VGS(off)

Vgs

VGSQ

Signal operation with

n-channel JFET

H. Chan; Mohawk College


Jfet drain characteristic curve

JFET Drain Characteristic Curve

ID

This is an alternative

view of the JFET

amplifier operation

showing the varia

-tion of Id with the

corresponding

change in Vgs & Vds.

Note that the CS

amplifier is equi-

valent to the CE

amplifier.

Id

Vgs

Q

IDQ

VGSQ

0

VDS

Vds

n-channel

operation

VDSQ

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Fet simplified equivalent circuit

FET Simplified Equivalent Circuit

  • Transconductance is defined as gm = DID/DVGS (siemens)

  • In ac quantities, gm = Id/Vgs

  • Rearranging the terms, Id = gmVgs

D

gmVgs

G

Vgs

S

r’gs and r’ds are assumed

to be very large

H. Chan; Mohawk College


Dc analysis of common source amplifier

DC Analysis of Common-Source Amplifier

If the circuit is biased at midpoint,

ID = IDSS/2

+VDD

Otherwise, solve for ID either

graphically or by finding the root

of the quadratic equation:

RD

RG

RS

where VGS has been substituted

by IDRS.

Then, VDS = VD-VS = VDD-ID(RD+RS)

DC Equivalent

circuit

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Ac analysis of cs amplifier

AC Analysis of CS Amplifier

  • Since Rin is very high, Vgs = Vin

  • Av = Vout/Vin

    = -IdRd/Vgs = -gmRd where, Rd = RD//RL

  • Vout = AvVin

    = -gmRdVin

Vout

Id

G

Rd

Vin

gmVgs

Vgs

RG

AC equivalent circuit

H. Chan; Mohawk College


Common source d mosfet amplifier

Common-Source D-MOSFET Amplifier

  • DC analysis is easier than for a JFET because ID = IDSS at VGS = 0

  • Once ID is known, VD= VDD - IDRD

  • AC analysis is the same as for JFET

  • Thus, Av = -gmRd

+VDD

RD

C1

C2

Vin

RL

RG

H. Chan; Mohawk College


Common source e mosfet amplifier

Common-Source E-MOSFET Amplifier

+VDD

DC analysis:

  • ID = K(VGS -VGS(th))2

  • VDS = VDD - IDRD

    AC analysis is same as JFET and D-MOSFET

  • i.e., Av = -gmRd

  • Rin = R1//R2//RINIgate)

  • RIN(gate) = VGS/IGSS

RD

R1

C1

C2

Vin

RL

Rs

H. Chan; Mohawk College


Common drain amplifier

Common-Drain Amplifier

+VDD

  • Rin = RG//RIN(gate)

  • Vout = IdRs = gmVgsRs, where Rs= RS//RL

  • Vin = Vgs + IdRs = Vgs+ gmVgsRs = Vgs(1+gmRs)

C1

C2

Vin

RG

RS

RL

CD amplifier is comparable

to the CC amplifier.

H. Chan; Mohawk College


Common gate amplifier

Common-Gate Amplifier

+VDD

  • Rin = Rin(source)//RS where Rin(source) = 1/gm

  • Vin = Vgs

  • Vout = IdRd = gmVgsRd where Rd = RD//RL

RD

C2

C1

RL

Vin

RS

CG amplifier is comparable

to the CB amplifier

H. Chan; Mohawk College


Amplifier frequency response

Amplifier Frequency Response

  • In the previous discussion of amplifiers, XC of the coupling and bypass capacitors was assumed to be 0 W at the signal frequency.

  • Also, the internal transistor capacitances were assumed to be negligible.

  • These capacitances, however, do affect the gain and phase shift of the amplifier over a specified range of input signal frequencies.

H. Chan; Mohawk College


Effect at low frequency

Effect At Low Frequency

  • Since XC = 1/(2pfC), when f is low (e.g. <10 Hz), XC >>0. The voltage drop across the input and output coupling capacitors become significant, leading to a drop in Av. Also, a phase shift is introduced because the coupling capacitor form a lead (or RC) circuit at the input and the output.

  • At low f, the significant XC across RE (or RS) makes the emitter (or source) no longer at ground potential, again reducing Av.

H. Chan; Mohawk College


Effect at high frequency

Effect At High Frequency

Cbc

  • At high f, Cbe causes a drop in signal voltage due to the voltage divider effect with RS.

  • At high f, Cbc allows negative feedback from output to cancel the input partially.

  • Av drops in each case.

Rs

Cbe

Vs

Rc

Cbc and Cbe are internal

junction capacitances

which are usually a few pF.

H. Chan; Mohawk College


General frequency response curve

General Frequency Response Curve

Av (dB)

3 dB

  • Av (dB) =20 log Av

  • Cutoff, critical,or corner frequency is the frequency when Av or Ap drops by 3 dB. This corresponds to 0.707Av(max) or 0.5 Ap(max) (half-power point) respectively.

Midrange

gain

f

fcl

fcu

fcl = lower cutoff frequency

fcu = upper cutoff frequency

Gain is max. at midrange,

often referenced as 0 dB.

H. Chan; Mohawk College


Input rc circuit at low frequency

Input RC Circuit At Low Frequency

Rin = R1//R2//Rin(base)

C1

Transistor

base

Critical frequency for this circuit is:

Vin

Rin

VR(in) leads Vin by:

q

Note: At fc, XC1 = Rin, q = 45o.

90o

If Rs of input source is included:

45o

0o

f

fc

H. Chan; Mohawk College


Output rc circuit at low frequency

Output RC CircuitAt Low Frequency

+VCC

Critical frequency for the output RC circuit:

C3

RC

The phase shift at the output:

RL

The effect of the output RC circuit on Av

is similar to that of the input RC circuit.

Av (dB)

0.1fc

fc

0

f

Drop in Av for each RC

circuit is 20 dB/decade

or 6 dB/octave

-3

-20

H. Chan; Mohawk College


Bypass rc circuit at low frequency

Bypass RC CircuitAt Low Frequency

At low frequency, the impedance at the

emitter is Ze = RE//XC2, and Av becomes:

+VCC

RC

The critical frequency is:

RE

C2

where Rth = R1//R2//Rs is the equivalent

Thevenin resistance looking from the

base toward the input source.

H. Chan; Mohawk College


Total low frequency response

Total Low-Frequency Response

  • fc1, fc2, and fc3 are the critical frequencies of the bypass, output and input RC circuits (not necessarily in that order).

  • The RC circuit giving fc3 is known as the dominant RC circuit.

fc1

fc2

fc3

f

0

-20

-20 dB/dec

-40

-40 dB/dec

-60

-80

-60 dB/dec

-100

-120

Bode plot of amplifier’s

low-frequency response

H. Chan; Mohawk College


Direct coupled amplifiers

Direct-Coupled Amplifiers

  • Since direct-coupled amplifiers don’t have coupling or bypass capacitors, their frequency response can extend down to dc.

  • Because of this, they are commonly used in linear ICs.

  • Although their gain is not as high as amplifiers with emitter bypass, Av stays constant at lower frequencies.

H. Chan; Mohawk College


Miller s theorem

Miller’s Theorem

  • Miller’s theorem can be used to simplify the analysis of inverting amplifiers at high frequencies.

  • C in the diagram can represent either Cbc of a BJT or Cgd of a FET.

C

In

Av

Out

Equivalent

to

Av

C(|Av|+1)

H. Chan; Mohawk College


Input rc circuit at high frequency

Input RC Circuit At High Frequency

Rs

Vs

R1//R2

Cin(Miller)

= Cbc(|Av|+1)

Cbe

Critical frequency:

Phase shift:

where Rtot = Rs//R1//R2//bacr’e ; and Ctot = Cbe+Cin(Miller)

H. Chan; Mohawk College


Output rc circuit at high frequency

Output RC Circuit At High Frequency

Critical frequency:

Rc

Phase shift:

Cout(Miller)

If |Av|  10, Cout(Miller)  Cbc

H. Chan; Mohawk College


Total amplifier frequency response

Total Amplifier Frequency Response

Av (dB)

Av(mid)

Bandwidth

= fcu - fcl

0

f

fc1

fc2

fc3

fc4

fc5

fc3 and fc4 are the two dominant critical frequencies where

Av is 3 dB below its midrange value. fc3 is the lower cutoff

frequency, fcl, andfc4 is the upper cutoff frequency, fcu.

H. Chan; Mohawk College


Gain bandwidth product

Gain-Bandwidth Product

Av

Av(mid)

fT is the frequency at which

Av = 1 (unity gain) or 0 dB.

BW

f

fcu

fT

  • For a given amplifier, its gain-bandwidth product is a constant when the roll-off is -20 dB/dec.

  • If fcu >> fcl, then BW = fcu - fcl fcu.

  • Unity-gain frequency, fT = Av(mid)BW = Av(mid)fcu .

H. Chan; Mohawk College


Fet amplifier at low frequency

FET Amplifier At Low Frequency

Input RC circuit:

+VDD

RD

where Rin = RG // Rin(gaate)

C1

C2

Output RC circuit:

Vin

RL

RG

Rin(gate) = |VGS / IDSS|

H. Chan; Mohawk College


Fet amplifier at high frequency

FET Amplifier At High Frequency

The high frequency analysis of an FET amplifier is very

similar to that of a BJT amplifier. The basic differences

are the specs of Cgd(= Crss), and the determination of Rin.

Input RC circuit:

where Ctot = Cgs + Cin(Miller); Cin(Miller) = Cgd(|Av|+ 1)

Output RC circuit:

H. Chan; Mohawk College


Multistage amplifiers1

Multistage Amplifiers

For an amplifier formed by cascading several stages, the

overall bandwidth is: BWtot = f’cu - f’cl

If all the stages have the same fcl and fcu, then:

and

If each stage has a different fcl and a different fcu, then f’cl

is determined by the stage with the highest fcl , and f’cu is

determined by the stage with the lowest fcu.

H. Chan; Mohawk College


Amplitude vs frequency measurement

Amplitude vs Frequency Measurement

Vin

Vout

Function

generator

Dual-channel

oscilloscope

Av

Test setup

Procedure:

  • Set sinewave frequency to mid-range and Vout at a convenient reference value (e.g. 1V). Decrease frequency until Vout = 0.707V to get fcl. Increase frequency until Vout = 0.707V to get fcu. Then amplifier’s BW = fcu - fcl. Make sure Vin is constant throughout the measurements.

H. Chan; Mohawk College


Step response measurement

Step Response Measurement

Input

  • Using previous test setup but replacing sinewave with a pulse input, measure the rise time (tr) and fall time (tf) of the output.

  • fcu = 0.35/tr

  • fcl = 0.35/tf

90%

Output

10%

tr

Input

90%

Output

10%

tf

H. Chan; Mohawk College


Review of zener diode regulator

Review of Zener Diode Regulator

  • If the zener was ideal, Vout would remain constant regardless of changes in Vin or RL.

  • However, in practice, the zener is limited by its operating parameters IZK, IZM, and ZZ.

R

Vout

Vin

VZ

RL

H. Chan; Mohawk College


Line regulation

Line Regulation

Line regulation is a measure of the effectiveness of

a voltage regulator to maintain the output dc voltage

constant despite changes in the supply voltage.

OR

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Load regulation

Load Regulation

Load regulation is a measure of the ability of a

regulator to maintain a constant dc output despite

changes in the load current.

OR

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Regulator block diagram

Regulator Block Diagram

The essential elements in a series voltage regulator are shown

in the block diagram below:

Control

element

VIN

VOUT

Error

detector

Sensing

circuit

Reference

voltage

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Transistor series voltage regulator

Transistor Series Voltage Regulator

Q1

The simple zener regulator

can be markedly improved

by adding a transistor.

Vo

Vin

R

RL

VL

Since VBE = VZ - VL any

tendency for VL to decrease

or increase will be negated

by an increase or decrease in IE. The dc currents for

the circuit are:

VZ

IL = hFEIB; IZT = IR - IB

H. Chan; Mohawk College


Series variable voltage regulator

Series Variable Voltage Regulator

Q1

  • Q2 detects and amplifies the difference between VZ and sample voltages and adjusts the conduction of Q1 so as to oppose any changes at the output.

Vo

Vin

R1

R3

R2

Q2

R4

R5

VZ

H. Chan; Mohawk College


Short circuit protection

Short-Circuit Protection

Q1

R3

The current limiting

circuit consists of

transistor Q3, and

resistor R3. When IL

< IL(max), Q3 is off, but if

it exceeds IL(max), Q3

turns on,drawing current.

away from the base of Q1

making Q1 conducts less

which in turn limits the

load current to IL(max).

Vo

Vin

R1

Q3

R4

R2

Q2

R5

VZ

R6

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Foldback limiting

Foldback Limiting

Q1

R2

Vo

Vin

Vo

R1

Q2

R3

IL

ISC

IL(max)

R4

Vo vs IL graph

VZ

Note that the short-circuit

current, ISC, is < IL(max) to

prevent overheating of Q1.

Foldback action starts

when VR2 - VR3 0.7

H. Chan; Mohawk College


Transistor shunt voltage regulator

Transistor Shunt Voltage Regulator

RS

Since VBE = VL - VZ,

any tendency for VL

to increase or decrease

will result in a

corresponding increase or decrease in IRs. This will

oppose any changes in VL because VL = Vin - IRsRS.

+

IL

VZ

+

Vin

VL

RL

_

_

IE = IRs - IL = hFEIZT

H. Chan; Mohawk College


Improved shunt regulator

Improved Shunt Regulator

RS

Vo

If Vo tries to decrease,

Q2 and Q1 become less

conductive. Since less

shunt current goes

through Q1, more

current will go to the

load, thus raising Vo.

Q2 provides a larger IB1

than the previous circuit

so this regulator can

handle a larger IL

Vin

Q1

VZ

Q2

R1

Vo = VZ + VBE1 + VBE2

H. Chan; Mohawk College


Silicon controlled rectifier

Silicon-Controlled Rectifier

  • SCR is a four-layer pnpn device.

  • Has 3 terminals: anode, cathode, and gate.

  • In off state, it has a very high resistance.

  • In on state, there is a small on (forward) resistance.

  • Applications: motor controls, time-delay circuits, heater controls, phase controls, etc.

H. Chan; Mohawk College


Electronics part ii

SCR

Anode (A)

A

A

Q1

p

n

Gate (G)

p

G

n

G

Q2

K

K

Cathode (K)

Schematic

Symbol

Equivalent

Circuit

Basic

Construction

H. Chan; Mohawk College


Turning the scr on

Turning The SCR On

IA

+V

RA

A

IA

IH0

Q1

IG1>IG0

IG2>IG1

IG0=0

IH1

IB1

IB2

IH2

VF

VBR(F2)

VBR(F1)

VBR(F0)

IG

Q2

IK

K

SCR characteristic curves

for different IG Values

H. Chan; Mohawk College


Notes on scr turn on

Notes on SCR Turn-On

  • The positive pulse of current at the gate turns on Q2 providing a path for IB1.

  • Q1 then turns on providing more base current for Q2 even after the trigger is removed.

  • Thus, the device stays on (latches).

  • The gate current, IG , controls the value of the forward-breakover voltage: VBR(F) decreases as IG is increased.

H. Chan; Mohawk College


Half wave power control

Half-Wave Power Control

IL

IL

IP

A

RL

R1

qf

Vin

B

R2

where qf = firing angle

Max. qf = 90o

D1

H. Chan; Mohawk College


The diac and the triac

The Diac and The Triac

  • Both the diac and the triac are types of thyristors that can conduct current in both directions (bilateral). They are four-layer devices.

  • The diac has two terminals, while the triac has a third terminal (gate).

  • The diac is similar to having two parallel Shockley diodes turned in opposite directions.

  • The triac is similar to having two parallel SCRs turned in opposite directions with a common gate.

H. Chan; Mohawk College


The diac

The Diac

IF

A1

A1

n

p

IH

-VBR(R)

VF

n

VR

VBR(F)

p

-IH

n

A2

A2

IR

Symbol

Basic

Construction

Characteristic Curve

H. Chan; Mohawk College


Diac equivalent circuit

Diac Equivalent Circuit

A1

R

Q3

A1

Q1

Vin

A2

Q2

Q4

Current can flow in

both directions

A2

H. Chan; Mohawk College


The triac

The Triac

A1

A1

A1

Q3

n

n

Q1

p

n

p

G

n

n

G

A2

Q4

Q2

Gate

A2

Symbol

Basic

Construction

A2

Equivalent circuit

H. Chan; Mohawk College


Triac phase control circuit

Triac Phase-Control Circuit

Trigger Point

(adjusted by R1)

RL

D1

A1

G

Vin

R1

Trigger Point

A2

D2

Voltage Waveform

across RL

H. Chan; Mohawk College


Diac controlling triac triggering

Diac Controlling Triac Triggering

A1

G

A

A2

  • The rated value of the gate trigger voltage for a triac is often too low for many applications.

  • The above circuit can used to raise the triggering level for the triac.

H. Chan; Mohawk College


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