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Team CHIP: Controlled Human Interface for Prosthetics

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Team CHIP: Controlled Human Interface for Prosthetics. Research Proposal Tuesday, March 11 th , 2007. Mentor: Dr. Pamela Abshire Graduate Student Mentor: Mr. Alfred Haas Avi Bardack Erik Li Pratik Bhandari Elaine Petro James Doggett Mark Sailey Max Epstein Natalie Salaets

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slide1

Team CHIP:

Controlled Human

Interface for Prosthetics

Research Proposal

Tuesday, March 11th, 2007

Mentor: Dr. Pamela Abshire

Graduate Student Mentor: Mr. Alfred Haas

Avi Bardack Erik Li

Pratik Bhandari Elaine Petro

James Doggett Mark Sailey

Max Epstein Natalie Salaets

Nick Gagliolo Ben Tousley

Steve Graff John (Andy) Turner

slide2

Outline

  • Introduction/Motivation
  • Research Problem
  • Research Question
  • Background
  • State of the Art
  • Where do we come in?
  • Methodology
  • Timeline
  • Conclusion/Summary
slide3

Introduction/Motivation

  • Simple, everyday tasks such as tying your shoes or drinking a cup of coffee are very difficult for those with artificial limbs.
  • 1.9 million amputees in America (NIH)
    • 50,000 more annually
  • 29,275 wounded in action during Operation Iraqi Freedom (U.S. DoD)
    • Significant percentage of wounded are amputees
slide4

Research Problem

  • Lack of functionality is the biggest problem facing amputees (Demet, 2003)
    • Many opt for cosmetic alternative or hook
    • EMG prosthetic seeks to mitigate effects of physical disabilities
  • Existing technologies
    • Many utilize bulky and/or inefficient interfaces
    • Other models require surgery

http://www.amputee-coalition.org/inmotion/nov_dec_02/handl_img02.jpg

slide5

Research Question

  • How can an EMG signal classifying chip be designed to enhance interactions between people and technological systems?
slide6

Background

  • Electromyographical (EMG) signal: the electric potential generated when a muscle contracts
    • Can be detected at the skin surface
  • Interface between people and technology

http://www.dataq.com/images/article_images/emg.jpg

signal processing background
Signal Processing Background
  • Noise Removal/Conditioning
  • Feature Extraction
  • Classification
fourier transform
Fourier Transform

dspguide.com

linear envelope generation
Linear Envelope Generation

http://educ.ubc.ca/faculty/sanderson/EMG/Documents/emg_linear_envelope.htm

classification
Classification
  • Manual/Arbitrary
  • (Semi)Automatic
    • PCA (Principle Component Analysis)
    • ANN (Artificial Neural Network)
hardware background
Hardware Background

input

output

  • Front-end
    • Bioamplifier magnifies weak bioelectric signal
    • Sets to appropriate level for classifier
    • Example: Harrison et al., 2003
      • CMOS bioamplifier with range of 25 mHz - 7.2 kHz
      • Consumes 80 µW of power
      • Occupies 0.16 mm2 area of chip

Preamplifier

Classifiers

Postamplifier

slide12

Hardware Background 2

input

output

Preamplifier

Classifiers

Postamplifier

  • Classifiers
    • Performs mathematical operations on amplified signal based on chosen signal processing algorithm
    • Depends on signal characteristics of interest
    • Example: Horiuchi et al., 2007
      • On-chip comparator detected spikes in signal
      • Based on measurements of peaks and troughs
slide13

Hardware Background 3

input

output

Preamplifier

Classifiers

Postamplifier

  • Back-end
    • Amplifier scales the classifier output to level appropriate for application
    • e.g. prosthetic control, video game control, etc.
  • Entire System
    • Low-power
    • Amplifiers: low-noise
state of the art technology
State of the Art Technology
  • Otto Bock
  • Utah Arm
recent prototypes
Recent Prototypes
  • Variability of Signal
    • Neural Network
  • Portability vs. Functionality
  • Number of Motions Discriminated and Accuracy Rate
slide17

Where do we come in?

  • EMG-controlled Prosthetic
    • Improved range of motion
    • More natural movements
    • Decreased learning/adaptation time
    • Entire system implemented on portable, miniaturized chip
slide18

Methodology

  • Engineering problem solving approach
    • Signal Acquisition
    • Signal Classification
    • Hardware Implementation
    • Prototype Testing
signal acquisition
Signal Acquisition

Getting the best sEMG signal:

  • Preamplifier
  • Choice of Muscles
  • Size of electrodes
slide21

Signal Classification

  • Need to select algorithms for noise reduction and signal classification
  • Determine common methods and techniques from literature search
  • Test effectiveness on existing data sets
  • Decide which features of the signal will be useful in classification
  • Use iterative development to improve selected algorithm
criteria for evaluation
Criteria for Evaluation
  • Efficiency
  • Accuracy
  • Ease of implementation
  • Robustness
  • Binary/Proportional
evaluation of algorithms
Evaluation of Algorithms
  • Decided on four algorithms to explore further
    • Fourier Transform
    • Independent Component Analysis (ICA)
    • Principle Component Analysis (PCA)
    • Support Vector Machine (SVM)
  • Will implement these in code
  • Evaluate each based on criteria
slide24

Hardware Implementation

  • Evaluate three different approaches for implementing system:
  • FPGA (Field-Programmable Gate Array)
  • Mixed-Signal IC (Integrated Circuit)
  • DSP (Digital Signal Processor)
fpga field programmable gate array

FPGA (Field-Programmable Gate Array)

Tools: HDL (Hardware Description Language), Code

Power – BAD

Speed – GOOD

Size – GOOD

Ease of Implementation – EASY

Precision based on bits

http://upload.wikimedia.org/wikipedia/commons/thumb/3/35/Fpga_xilinx_spartan.jpg/556px-Fpga_xilinx_spartan.jpg

mixed signal ic integrated circuit

Mixed-Signal IC (Integrated Circuit)

Tools: Design, HDL for Digital ASIC (Application Specific Integrated Circuit)

Power – BEST

Speed – BEST

Size – BEST

Ease of Implementation – HARD

Precision based on noise

http://www.uta.edu/ra/real/images/0/537_0_570.jpg

dsp digital signal processor

DSP (Digital Signal Processor)

Tools: Development Kit, Program

Power – OK

Speed – OK

Size – OK

Ease of Implementation – EASY

Precision based on bits

http://www.kk7p.com/images/dspx2185a.jpg

slide28

Testing

  • Preliminary Phase
    • Test prototype on team members
    • No IRB required
  • Secondary Phase
    • Test improved prototype on outside subjects
      • College students
      • Amputees at Walter Reed Army Medical Center
    • Two sub-phases
      • Front-end only
      • Full integrated system
    • IRB required
slide29

Summary

  • Ultimate goal: EMG signal classifying system implemented in hardware
    • Low-power
    • Minimal delay
    • Miniaturized
  • Applied to an improved EMG controlled prosthetic
    • More degrees of freedom
    • Decreased learning/adaptation time
  • Other applications in biological signal processing
slide30

Timeline

  • Sophomore Year
    • Fall 2007
      • Study previous IBIS Lab EMG software, hardware and data
      • Decide on target muscle groups
      • Evaluate simple signal processing algorithms for classification in MATLAB
      • Learn basic integrated circuit design and development
    • Spring 2008
      • Identify/contact outside individuals for secondary testing phase
      • Design/develop optimal signal processing algorithm
      • Continue learning integrated circuit design and development
      • Choose between prefabricated and/or custom chip
      • Select showcase application of our technology
      • Conduct preliminary testing of EMG system components in lab
      • Apply for IRB approval
slide31

Timeline 2

  • Junior Year
    • Fall 2008
      • Simulate implementation of the algorithm on a chip
      • Optimize and debug chip design
      • Draft chapter 1 and 2 of thesis
      • Send in chip design to manufacturer (if custom chip) to be constructed
      • Complete preliminary testing phase
    • Spring 2009
      • Begin testing actual chip with outside test subjects (secondary testing phase)
      • Revise/optimize chip design based on test results
      • Resubmit chip design to manufacturer, if necessary
      • Draft and revise chapters 1-3 of thesis
      • Search for organizations/businesses with possible interest in our project
slide32

Timeline 3

  • Senior Year
    • Fall 2009
      • Develop physical demonstration of our technology
      • Possibly pitch project to interested organizations/businesses
      • Complete entire draft of thesis, make revisions
      • Draft thesis presentation
      • Possibly file for a patent for our chip
    • Spring 2010
      • Practice thesis presentation at rehearsal
      • Finalize thesis, submit draft
      • Present and defense thesis at Team Thesis Conference
      • Revise and submit final thesis
      • Possibly publish work in relevant technical journal
slide33

References

  • Demet, K., Martinet, N., Guillemin, F., Paysant, J., & Andre, J. (2003). Health related quality of life and related factors in 539 persons with amputation of upper and lower limb. Disability & Rehabilitation, 25(9; 9), 480.
  • Harrison, R. R., & Charles, C. (2003). A low-power low-noise CMOS amplifier for neural recording applications. Solid-State Circuits, IEEE Journal of, 38(6), 958-965.
  • Horiuchi, T., Tucker, D., Boyle, K., & Abshire, P. (2007). Spike discrimination using amplitude measurements with a low-power CMOS neural amplifier. Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on, 3123-3126.
  • Tenore F., Ramos A., Fahmy A., Acharya S., Etienne-Cummings R., Thakor N., “Towards the Control of Individual Fingers of a Prosthetic Hand Using Surface EMG Signals”, Proc. 29th Annual International Conference of the IEEE EMBS, August 23-26, 2007.
  • United States Department of Defense. (2008). OPERATION IRAQI FREEDOM (OIF) U.S. CASUALTY STATUS. Retrieved February 28, 2008 from http://www.defenselink.mil/news/casualty.pdf
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