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  1. Machine-Level Programming I: BasicsComp 21000: Introduction to Computer Organization & Systems Spring 2014 Instructor: John Barr * Modified slides from the book “Computer Systems: a Programmer’s Perspective”, Randy Bryant & David O’Hallaron, 2011

  2. Today: Machine Programming I: Basics • History of Intel processors and architectures • C, assembly, machine code • Assembly Basics: Registers, operands, move • Intro to x86-64

  3. Intel x86 Processors • Totally dominate laptop/desktop/server market • but not the phone/tablet market (that’s ARM) • Evolutionary design • Backwards compatible up until 8086, introduced in 1978 • Added more features as time goes on • Complex instruction set computer (CISC) • Many different instructions with many different formats • But, only small subset encountered with Linux programs • Hard to match performance of Reduced Instruction Set Computers (RISC) • But, Intel has done just that! • In terms of speed. Less so for low power.

  4. Intel x86 Evolution: Milestones Name Date Transistors MHz • 8086 1978 29K 5-10 • First 16-bit processor. Basis for IBM PC & DOS • 1MB address space • 386 1985 275K 16-33 • First 32 bit processor , referred to as IA32 • Added “flat addressing” • Capable of running Unix • 32-bit Linux/gcc uses no instructions introduced in later models • Pentium 4F 2004 125M 2800-3800 • First 64-bit processor, referred to as x86-64 • Core i7 2008 731M 2667-3333 • Our shark machines

  5. Intel x86 Processors: Overview Architectures Processors X86-16 8086 286 X86-32/IA32 386 486 Pentium Pentium MMX Pentium III Pentium 4 Pentium 4E MMX SSE SSE2 SSE3 X86-64 / EM64t Pentium 4F Core 2 Duo Core i7 time SSE4 IA: often redefined as latest Intel architecture

  6. Intel x86 Processors, contd. • Machine Evolution • 38619850.3M • Pentium 1993 3.1M • Pentium/MMX 1997 4.5M • PentiumPro 1995 6.5M • Pentium III 1999 8.2M • Pentium 4 2001 42M • Core 2 Duo 2006 291M • Core i7 2008 731M • Added Features • Instructions to support multimedia operations • Parallel operations on 1, 2, and 4-byte data, both integer & FP • Instructions to enable more efficient conditional operations • Linux/GCC Evolution • Two major steps: 1) support 32-bit 386. 2) support 64-bit x86-64

  7. More Information • Intel processors (Wikipedia) • Intel microarchitectures

  8. New Species: ia64, then IPF, then Itanium,… Name Date Transistors • Itanium 2001 10M • First shot at 64-bit architecture: first called IA64 • Radically new instruction set designed for high performance • Can run existing IA32 programs • On-board “x86 engine” • Joint project with Hewlett-Packard • Itanium 2 2002 221M • Big performance boost • Itanium 2 Dual-Core 2006 1.7B • Itanium has not taken off in marketplace • Lack of backward compatibility, no good compiler support, Pentium 4 got too good

  9. x86 Clones: Advanced Micro Devices (AMD) • Historically • AMD has followed just behind Intel • A little bit slower, a lot cheaper • Then • Recruited top circuit designers from Digital Equipment Corp. and other downward trending companies • Built Opteron: tough competitor to Pentium 4 • Developed x86-64, their own extension to 64 bits

  10. Intel’s 64-Bit • Intel Attempted Radical Shift from IA32 to IA64 • Totally different architecture (Itanium) • Executes IA32 code only as legacy • Performance disappointing • AMD Stepped in with Evolutionary Solution • x86-64 (now called “AMD64”) • Intel Felt Obligated to Focus on IA64 • Hard to admit mistake or that AMD is better • 2004: Intel Announces EM64T extension to IA32 • Extended Memory 64-bit Technology • Almost identical to x86-64! • All but low-end x86 processors support x86-64 • But, lots of code still runs in 32-bit mode

  11. Our Coverage • IA32 • The traditional x86 • x86-64/EM64T • The newstandard • We’ll only talk about in passing • Presentation • Book presents IA32 in Sections 3.1—3.12 • Covers x86-64 in 3.13

  12. Today: Machine Programming I: Basics • History of Intel processors and architectures • C, assembly, machine code • Assembly Basics: Registers, operands, move • Intro to x86-64

  13. Definitions • Architecture: (also instruction set architecture: ISA) The parts of a processor design that one needs to understand to write assembly code. • Examples: instruction set specification, registers. • Microarchitecture: Implementation of the architecture. • Examples: cache sizes and core frequency. • Example ISAs (Intel): x86, IA, IPF

  14. Programmer-Visible State PC: Program counter Address of next instruction Called “EIP” (IA32) or “RIP” (x86-64) Register file Heavily used program data 8 named locations, 32 bit values (x86-64) Condition codes Store status information about most recent arithmetic operation Used for conditional branching Memory Byte addressable array Code, user data, (some) OS data Includes stack used to support procedures Assembly Programmer’s View Memory CPU Addresses Registers Object Code Program Data OS Data PC Data Condition Codes Instructions Stack

  15. Program’s View: memory Memory invisible to user code Kernel virtual memory 0xC0000000 User stack (created at runtime) %esp (stack pointer) Variables in functions go here Memory mapped region for shared libraries 0x40000000 NOTE: MEMORY GROWS UP; 0 IS AT BOTTOM! brk Variables in main() go here Run-time heap (created at runtime by malloc) Read/write segment (.data, .bss) Loaded from the executable file Machine instructions go here Read0nly segment (.init, .text, .rodata) 0x08048000 Unused 0

  16. CPU’s View: fetch, decode, execute Memory invisible to user code Kernel virtual memory CPU 0xc0000000 User stack (created at runtime) Registers E I P %esp (stack pointer) Condition Codes Memory mapped region for shared libraries 0x40000000 brk Run-time heap (created at runtime by malloc) Read/write segment (.data, .bss) • Fetch instruction from memory (%eip contains the address in memory) • Increment %eip to next instruction address Loaded from the executable file Read-only segment (.init, .text, .rodata) 0x08048000 Unused 0

  17. CPU’s View Memory invisible to user code Kernel virtual memory CPU 0xc0000000 User stack (created at runtime) Registers E I P %esp (stack pointer) Condition Codes Memory mapped region for shared libraries 0x40000000 brk Run-time heap (created at runtime by malloc) 2. Decode instruction and fetch arguments from memory (if necessary) Operand could come from R/W segment, heap or user stack Read/write segment (.data, .bss) Loaded from the executable file Read-only segment (.init, .text, .rodata) 0x08048000 Unused 0

  18. CPU’s View Memory invisible to user code Kernel virtual memory CPU 0xc0000000 User stack (created at runtime) Registers E I P %esp (stack pointer) Condition Codes Memory mapped region for shared libraries 0x40000000 brk Run-time heap (created at runtime by malloc) 3. Execute instruction and store results Operand could go to R/W segment, heap or user stack Read/write segment (.data, .bss) Loaded from the executable file Read-only segment (.init, .text, .rodata) 0x08048000 Unused 0

  19. CPU’s View Memory invisible to user code Kernel virtual memory CPU 0xc0000000 User stack (created at runtime) Registers E I P %esp (stack pointer) Condition Codes Memory mapped region for shared libraries 0x40000000 brk Run-time heap (created at runtime by malloc) Read/write segment (.data, .bss) 1. Repeat: Fetch next instruction from memory (%eip contains the addess in memory) Loaded from the executable file Read-only segment (.init, .text, .rodata) 0x08048000 Unused 0

  20. Example • See: http://courses.cs.vt.edu/csonline/MachineArchitecture/Lessons/CPU/index.html Much simpler than the IA32 architecture. Does not make the register file explicit. Uses an accumulator (not in IA32).

  21. Turning C into Object Code • Code in filesp1.c p2.c • Compile with command:gcc –O1 p1.c p2.c -o p • Use basic optimizations (-O1) • Put resulting binary in file p text C program (p1.c p2.c) Compiler (gcc -S)(-S means stop after compiling) text Asm program (p1.s p2.s) Assembler (gcc or as) binary Object program (p1.o p2.o) Static libraries (.a) Linker (gcc orld) binary Executable program (p)

  22. Compiling Into Assembly Generated IA32 Assembly C Code sum: pushl%ebp movl%esp,%ebp movl12(%ebp),%eax addl8(%ebp),%eax popl%ebp ret intsum(intx, inty) { intt = x+y; return t; } Some compilers use instruction “leave” Use the –O0 flag (dash uppercase ‘O’ number zero) to eliminate optimization. Otherwise you’ll get strange register moving. • Obtain with command • gcc –O0 -S –m32 sumIt.c • Produces file code.s-m32 means generate 32-bit code

  23. Looking at Assembly Code (method 1) Generated IA32 Assembly C Code sum: pushl%ebp movl%esp,%ebp movl12(%ebp),%eax addl8(%ebp),%eax popl%ebp ret intsum(intx, inty) { intt = x+y; return t; } Some compilers use instruction “leave” Use the –O0 flag (dash uppercase ‘O’ number zero) to eliminate optimization. Otherwise you’ll get strange register moving. • Obtain with command • gcc –O0 -g –m32 sumIt.c • Produces file code.s-m32 means generate 32-bit code • -g puts in hooks for gdb

  24. gdb • run with executable file a.out • gdba.out • quit • quit • running • run • stop Reference: http://www.yolinux.com/TUTORIALS/GDB-Commands.html

  25. gdb • examine source code: • list firstLineNum, secondLineNum • where firstLineNumis the first line number of the code that you want to examine secondLineNumis the ending line number of the code. • break points • break lineNum • lineNumis the line number of the statement that you want to break at. • debugging • step // step one C instruction (steps into) • stepi // step one assembly instruction • next // steps one C instruction (steps over) • where // info about where execution is stopped

  26. gdb • Viewing data • print x • This prints the value currently stored in the variable x. • print &x • This prints the memory address of the variable x. • display x • This command will print the value of variable x every time the program stops.

  27. gdb • Getting low level info about the program • info line lineNum • This command provides some information about line number lineNum including the memory address (in hex) where it is stored in RAM. • disassem memAddress1 memAddress2 • prints the assembly language instructions located in memory between memAddress1 and memAddress2. • x memAddress • This command prints the contents of the memAdress in hexadecimal notation. You can use this command to examine the contents of a piece of data. There are many more commands that you can use in gdb. While running you can type help to get a list of commands.

  28. Assembly Characteristics: Data Types • “Integer” data of 1, 2, or 4 bytes • Data values • Addresses (untyped pointers) • Floating point data of 4, 8, or 10 bytes • No aggregate types such as arrays or structures • Just contiguously allocated bytes in memory

  29. Assembly Characteristics: Operations • Perform arithmetic function on register or memory data • Transfer data between memory and register • Load data from memory into register • Store register data into memory • Transfer control • Unconditional jumps to/from procedures • Conditional branches

  30. Assembly Language Versions • There is only one Intel IA-32 machine language • There are two ways of writing assembly language on top of this: • Intel version • AT&T version • The gcc compiler uses the AT&T version. That’s also what the book uses and what we’ll use in these slides. • Most reference material is in the Intel version

  31. Assembly Language Versions • There are slight differences, the most glaring being the placement of source and destination in an instruction: • Intel: instruction dest, src • AT&T: instruction src, dest • Intel code omits the size designation suffixes • mov instead of movl • Intel code omits the % before a register • eax instead of %eax • Intel code has a different way of describing locations in memory • [ebp+8] instead of 8(%ebp)

  32. Object Code Code for sum • Assembler • Translates .s into .o • Binary encoding of each instruction • Nearly-complete image of executable code • Missing linkages between code in different files • Linker • Resolves references between files • Combines with static run-time libraries • E.g., code for malloc, printf • Some libraries are dynamically linked • Linking occurs when program begins execution 0x401040 <sum>: 0x55 0x89 0xe5 0x8b 0x45 0x0c 0x03 0x45 0x08 0x5d 0xc3 • Total of 11 bytes • Each instruction 1, 2, or 3 bytes • Starts at address 0x401040

  33. Machine Instruction Example int t = x+y; • C Code • Add two signed integers • Assembly • Add 2 4-byte integers • “Long” words in GCC parlance • Same instruction whether signed or unsigned • Operands: x: Register %eax y: Memory M[%ebp+8] t: Register %eax • Return function value in %eax • Object Code • 3-byte instruction • Stored at address 0x80483ca addl8(%ebp),%eax Similar to expression: x+= y More precisely: inteax; int*ebp; eax+= ebp[2] 0x80483ca: 03 45 08

  34. Machine Instruction Example int t = x+y; • C Code • Three variables • Assembly • Use registers or memory locations • Can “name” memory locations • Memory location names are called “labels” • A label can represent a “variable” or a “function name” • Object Code • 3-byte instruction • No labels allowed • Symbol table • Assembler must change labels into memory locations • To do this, keeps a table that associates a memory location for every label • Called a symbol table addl8(%ebp),%eax Similar to expression: x+= y More precisely: inteax; int*ebp; eax+= ebp[2] 0x80483ca: 03 45 08

  35. Disassembling Object Code Disassembled • Disassembler objdump -d p Otool –tV p // in Mac OS • Useful tool for examining object code • -d means disassemble • p is the file name (e.g., could be a.out) • Analyzes bit pattern of series of instructions • Produces approximate rendition of assembly code • Can be run on either a.out (complete executable) or .o file 080483c4 <sum>: 80483c4: 55 push %ebp 80483c5: 89 e5 mov %esp,%ebp 80483c7: 8b 45 0c mov 0xc(%ebp),%eax 80483ca: 03 45 08 add 0x8(%ebp),%eax 80483cd: 5d pop %ebp 80483ce: c3 ret

  36. Alternate Disassembly Disassembled Object • Within gdb Debugger gdb p disassemble sum • Disassemble procedure x/11xb sum • Examine the 11 bytes starting at sum 0x401040: 0x55 0x89 0xe5 0x8b 0x45 0x0c 0x03 0x45 0x08 0x5d 0xc3 Dump of assembler code for function sum: 0x080483c4 <sum+0>: push %ebp 0x080483c5 <sum+1>: mov %esp,%ebp 0x080483c7 <sum+3>: mov 0xc(%ebp),%eax 0x080483ca <sum+6>: add 0x8(%ebp),%eax 0x080483cd <sum+9>: pop %ebp 0x080483ce <sum+10>: ret

  37. Direct creation of assembly programs Assembly Program • In .s file % gcc –S p.c • Result is an assembly program in the file p.s .file "assemTest.c" .text .type sum.0, @function sum.0: pushl %ebp movl %esp, %ebp subl $4, %esp movl 12(%ebp), %eax addl 8(%ebp), %eax leave ret .size sum.0, .-sum.0 .globl main .type main, @function main: pushl %ebp movl %esp, %ebp subl $8, %esp andl $-16, %esp subl $16, %esp movl $0, %eax leave ret .size main, .-main .section .note.GNU-stack,"",@progbits .ident "GCC: (GNU) 3.4.6 Assembler directives Assembly commands Symbols

  38. Features of Disassemblers • Disassemblers determine the assembly code based purely on the byte sequences in the object file. • Do not need source file • Disassemblers use a different naming convention than the GAS assembler. • Example: omits the “l” from the suffix of many instructions. • Disassembler uses nop instruction (no operation). • Does nothing; just fills space. • Necessary in some machines because of branch prediction • Necessary in some machines because of addressing restrictions

  39. What Can be Disassembled? • Anything that can be interpreted as executable code • Disassembler examines bytes and reconstructs assembly source % objdump -d WINWORD.EXE WINWORD.EXE: file format pei-i386 No symbols in "WINWORD.EXE". Disassembly of section .text: 30001000 <.text>: 30001000: 55 push %ebp 30001001: 8b ecmov%esp,%ebp 30001003: 6a ff push $0xffffffff 30001005: 68 90 10 00 30 push $0x30001090 3000100a: 68 91 dc 4c 30 push $0x304cdc91

  40. Machine Programming I: Basics • History of Intel processors and architectures • C, assembly, machine code • Assembly Basics: Registers, operands, move • Intro to x86-64

  41. CISC Properties • Instruction can reference different operand types • Immediate, register, memory • Arithmetic operations can read/write memory • Memory reference can involve complex computation • Rb + S*Ri + D • Useful for arithmetic expressions, too • Instructions can have varying lengths • IA32 instructions can range from 1 to 15 bytes

  42. Features of IA32 instructions • IA32 instructions can be from 1 to 15 bytes. • More commonly used instructions are shorter • Instructions with fewer operands are shorter • Each instruction has an instruction format • Each instruction has a unique byte representation • i.e., instruction pushl %ebp has encoding 55 • IA32 started as a 16 bit language • So IA32 calls a 16-bit piece of data a “word” • A 32-bit piece of data is a “double word” or a “long word” • A 64-bit piece of data is a “quad word”

  43. Programmer-Visible State PC: Program counter Address of next instruction Called “EIP” (IA32) or “RIP” (x86-64) Register file Heavily used program data 8 named locations, 32 bit values (x86-64) Condition codes Store status information about most recent arithmetic operation Used for conditional branching Memory Byte addressable array Code, user data, (some) OS data Includes stack used to support procedures Assembly Programmer’s View (review) Memory CPU Addresses Registers Object Code Program Data OS Data PC Data Condition Codes Instructions Stack

  44. Instruction format • Assembly language instructions have a very rigid format • For most instructions the format is movlSource, Dest Instruction name Instruction suffix Destination of instruction results: Registers/memory Source of data for the instruction: Registers/memory

  45. Instruction suffix • Every operation in GAS has a single-character suffix • Denotes the size of the operand • Example: basic instruction is mov • Can move byte (movb), word (movw) and double word (movl) • Note that floating point operations have entirely different instructions.

  46. Registers • 8 32-bit general purpose registers • Programmers/compilers can use these • All registers begin with %e • Rest of name is historical: from 8086 • Registers originally had specific purposes • No restrictions on use of registers in commands • However, some instructions use fixed registers as source/destination • In procedures there are different conventions for saving/restoring the first 3 registers (%eax, %eac, %edx) than the next 3 (%ebx, %edi, %esi). • Final two registers have special purposes in procedures • %ebp (frame pointer) • %esp (stack pointer) • Will discuss all these later

  47. Registers • 8 32-bit general purpose registers • The low-order bytes of the first 4 registers can be independently read or written by byte operation instructions. • Done for backward compatibility with 8008 and 8080 (1970’s!) • When a byte of the register is changed, the rest of the register is unaffected. • The low-order 2 bytes (16 bits, i.e., a single word) can be independently read/wrote by word operation instructions • Comes from 8086 16-bit heritage • When a word of the register is changed, the rest of the register is unaffected. • See next slide!

  48. %eax %ecx %edx %ebx %esi %edi %esp %ebp Integer Registers (IA32) Origin (mostly obsolete) 8-bit register (%ah, %al,ch, …) %ax %ah %al accumulate %cx %ch %cl counter %dx %dh %dl data general purpose %bx %bh %bl base source index %si destination index %di stack pointer %sp base pointer %bp 16-bit virtual registers (%ax, %cx,dx, …) (backwards compatibility) 32-bit register (%eax, %ecx, …)

  49. %eax %ecx %edx %ebx %esi %edi %esp %ebp Moving Data: IA32 • Moving Data movlSource, Dest: • Move 4-byte (“long”) word • Lots of these in typical code • Operand Types • Immediate: Constant integer data • Example: $0x400, $-533 • Like C constant, but prefixed with ‘$’ • Encoded with 1, 2, or 4 bytes • Register: One of 8 integer registers • Example: %eax, %edx • But %espand %ebpreserved for special use • Others have special uses for particular instructions • Memory: 4 consecutive bytes of memory at address given by register • Simplest example: (%eax) • Various other “address modes”

  50. Simple Memory Addressing Modes • Normal (R) Mem[Reg[R]] • Register R specifies memory addressmovl (%ecx),%eax • Displacement D(R) Mem[Reg[R]+D] • Register R specifies start of memory region • Constant displacement D specifies offsetmovl8(%ebp),%edx