Topic 5 Processor Development. AH Computing Computer Architecture. SQA arrangements.
Development of Intel
Look at the evolution of families of processors
Compare the following features and techniques
The X86 series of microprocessors can be characterised as having:
In the final years of the 68000 processors, Apple, Motorola and IBM defined a specification for open system software and hardware, and Motorola and IBM designed the first PowerPC chip to meet this specification.
Used in the Nintendo Wii
Direct addressing for Load, Store and Branch instructions. All other instruction address internal registersComparison of X86 with PowerPC
TRENDS important All other instruction address internal registers
Q10: Apple, Motorola, IBM
Q11: the 601 in 1993
Q12: it has 3 independent processing units - the floating point unit (FPU), the integer
ALU, and the system unit
Q13: 2 sets of 32 registers, each 64 bits wide
Q14: a) similar - X86 has 235 different instructions, PowerPC has 225
b) X86 has varied instruction lengths (1-11 bytes), the PowerPC instructions are all
exactly 4 bytes
c) the X86 has 11 addressing modes, the PowerPC has only 2
Q15: L2 "backside" cache on chip
Q16: d) G4
Q17: because the Mac uses the more efficient RISC architecture, a Mac with a lower
clock speed may outperform a Windows PC with a higher clock speed
Q18: IBM servers, Nintendo Game Cube, and a range of embedded applications
When the instruction arrives at the processor, the 3 instructions are directed to the appropriate execution unit for processing:
=1024 x 1024 Terabytes
= 1024 x 1024 x 1024 Gigabytes
Q19: VLIW = very large instruction word; the IA-64 fetches a 128 bit bundle containing 3 41-bit instructions during each memory fetch
Q20: yes, it has 11 execution units which can operate in parallel
Q21: branch prediction mean "guessing" whether or not a branch will be taken, and executing following instructions accordingly - if the prediction is wrong, the pipeline will stall; predication means executing instructions from both branches simultaneously, and discarding the results from the branch which is not required
Q22: due to its parallel execution units, 10 stage pipeline, VLIW memory accessing and use of predication and speculative loading, the Itanium can process up to 20 operations per cycle.
All single processors
To achieve communication between processors, parallel computers use:
Chip – 2 processors
Card – 2 chips
Node – 16 cards
Cabinet – 32 nodes
System – 64 cabinets
JGT(37) If the flag is set jump to location 37
Describe the problem that instruction JGT(37) could cause for a processor using a pipeline.
Mediatrain is a company which uses a high performance computer system to produce multimedia training projects. The computer system has a PowerPC superscalar processor which has thirty two 64-bit general purpose registers.
(a) The PowerPC is an example of a RISC processor. RISC processors have a large number of general purpose registers. Name three other features of a RISC processor that distinguish it from a CISC
c. Explain the benefit to the PowerPC processor of having so many general purpose registers (2)
d. Most of the instructions in the PowerPC processor instruction set have an op-code and an operand.
Describe the function of the op-code and the operand. (2)
e. Superscalar processing involves the use of multiple pipelines.
State a feature of the PowerPC processor which makes it suited to superscalar processing. Justify your answer. (4)
f. Branch instructions can cause a problem for processors which use pipelines.
Branch prediction can reduce this problem.
Describe how branch prediction operates. (3)
(g) The PowerPC processor makes use of Single Instruction Multiple Data (SIMD) instructions.
Explain how the use of SIMD instructions improves performance, using a suitable multimedia example. (3)
15. The Pentium III processor has eight registers which can be operated on by SIMD instructions.
(a) Describe what is meant by a SIMD instruction. (1)
(b) Describe how the Pentium III could use SIMD instructions and registers when adjusting the brightness of a graphic. (3)