slide1 l.
Download
Skip this Video
Loading SlideShow in 5 Seconds..
PN Junctions Theory Dragica Vasileska Department of Electrical Engineering Arizona State University PowerPoint Presentation
Download Presentation
PN Junctions Theory Dragica Vasileska Department of Electrical Engineering Arizona State University

Loading in 2 Seconds...

play fullscreen
1 / 43

PN Junctions Theory Dragica Vasileska Department of Electrical Engineering Arizona State University - PowerPoint PPT Presentation


  • 311 Views
  • Uploaded on

PN Junctions Theory Dragica Vasileska Department of Electrical Engineering Arizona State University. PN-Junctions: Introduction to some general concepts Current-Voltage Characteristics of an Ideal PN-junction (Shockley model) Non-Idealities in PN-Junctions AC Analysis and Diode Switching.

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about 'PN Junctions Theory Dragica Vasileska Department of Electrical Engineering Arizona State University' - wallis


An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
slide1

PN Junctions Theory

Dragica Vasileska

Department of Electrical Engineering

Arizona State University

  • PN-Junctions: Introduction to some general concepts
  • Current-Voltage Characteristics of an Ideal PN-junction (Shockley model)
  • Non-Idealities in PN-Junctions
  • AC Analysis and Diode Switching
slide2

n-side

p-side

1. PN-junctions - General Consideration:

  • PN-junction is a two terminal device.
  • Based on the doping profile, PN-junctions can be separated into two major categories:
  • - step junctions
  • - linearly-graded junctions

n-side

p-side

Step junction

Linearly-graded junction

slide3

qND

+

-

-qNA

(A) Equilibrium analysis of step junctions

(a) Built-in voltage Vbi:

(b) Majority- minority carrier

relationship:

p-side

n-side

slide4

(c) Depletion region width:

 Solve 1D Poisson equation using depletion charge approximation, subject to the following boundary condi-tions:

p-side:

n-side:

 Use the continuity of the two solutions at x=0, and charge neutrality, to obtain the expression for the depletion region width W:

slide5

(d) Maximum electric field:

The maximum electric field, which occurs at the metallurgical junction, is given by:

(e) Carrier concentration variation:

slide8

Measurement setup:

W

dW

~

V

(f) Depletion layer capacitance:

 Consider a p+n, or one-sided junction, for which:

 The depletion layer capacitance is calculated using:

Reverse

bias

vac

Forward bias

slide9

(B) Equilibrium analysis of linearly-graded junction:

(a) Depletion layer width:

(c) Maximum electric field:

(d) Depletion layer capacitance:

Based on accurate numerical simulations, the depletion layer capacitance can be more accurately calculated if Vbi is replaced by the gradient voltage Vg:

slide10

(2) Ideal Current-Voltage Characteristics:

  • Assumptions:
  • Abrupt depletion layer approximation
  • Low-level injection  injected minority carrier density much smaller than the majority carrier density
  • No generation-recombination within the space-charge region (SCR)
  • (a) Depletion layer:
slide11

Forward bias

Space-charge

region W

Reverse bias

  • (b) Quasi-neutral regions:
  • Using minority carrier continuity equations, one arrives at the following expressions for the excess hole and electron densities in the quasi-neutral regions:
slide12

Shockley model

No SCR generation/recombination

  • Corresponding minority-carriers diffusion current densities are:
slide13

I

Ge

Si

GaAs

V

  • (c) Total current density:
  • Total current equals the sum of the minority carrier diffu-sion currents defined at the edges of the SCR:
  • Reverse saturation current IS:
slide14

(d) Origin of the current flow:

Reverse bias:

Forward bias:

Ln

Lp

Reverse saturation current is due to minority carriers being collected over a distance on the order of the diffusion length.

slide15

(e) Majority carriers current:

  • Consider a forward-biased diode under low-level injection conditions:
  • Total hole current in the quasi-neutral regions:

Quasi-neutrality requires:

This leads to:

slide17

(f) Limitations of the Shockley model:

  • The simplified Shockley model accurately describes IV-characteristics of Ge diodes at low current densities.
  • For Si and Ge diodes, one needs to take into account several important non-ideal effects, such as:
  • Generation and recombination of carriers within the depletion region.
  • Series resistance effects due to voltage drop in the quasi-neutral regions.
  •  Junction breakdown at large reverse biases due to tun-neling and impact ionization effects.
slide18

3. Non-Idealities in PN-junctions:

  • (A) Generation and Recombination Currents
  •  Continuity equation for holes:
  •  Steady-state and no light genera-
  • tion process:
  • Space-charge region recombination current:
slide19

Reverse-bias conditions:

  • Concentrations n and p are negligible in the depletion region:
  • Space-charge region current is actually generation current:
  • Total reverse-saturation current:

Generation lifetime

slide20

W

  • Generation current dominates when ni is small, which is always the case for Si and GaAs diodes.

I (log-scale)

V (log-scale)

Generated carriers are swept away from the depletion region.

IV-characteristics

under reverse bias conditions

slide21

Forward-bias conditions:

  • Concentrations n and p are large in the depletion region:
  • Condition for maximum recombination rate:
  • Estimate of the recombination current:

Recombination lifetime

slide22

Exact expression for the recombination current:

  • Corrections to the model:
  • Total forward current:
  •   ideality factor. Deviations of  from unity represent an important measure for the recombination current.
slide23

Importance of recombination effects:

  • Low voltages, small ni recombination current dominates
  • Large voltages  diffusion current dominates

log(I)

V

slide24

(B) Breakdown Mechanisms

  • Junction breakdown can be due to:
  • tunneling breakdown
  • avalanche breakdown
  • One can determine which mechanism is responsible for the breakdown based on the value of the breakdown voltage VBD :
  •  VBD < 4Eg/q  tunneling breakdown
  •  VBD > 6Eg/q  avalanche breakdown
  •  4Eg/q < VBD < 6Eg/q  both tunneling and
  • avalanche mechanisms are responsible
slide25

Tunneling breakdown:

  • Tunneling breakdown occurs in heavily-doped pn-junctions in which the depletion region width W is about 10 nm.

Zero-bias band diagram:

Forward-bias band diagram:

EFn

EFp

EF

EC

EC

EV

EV

W

W

slide26

Tunneling current (obtained by using WKB approximation):

  • Fcr average electric field in
  • the junction
  • The critical voltage for tunneling breakdown, VBR, is estimated from:
  • With T, Eg and It .

Reverse-bias band diagram:

EFp

EFn

EC

EV

slide27

Avalanche breakdown:

  • Most important mechanism in junction breakdown, i.e. it imposes an upper limit on the reverse bias for most diodes.
  • Impact ionization is characterized by ionization ratesan and ap, defined as probabilities for impact ionization per unit length, i.e. how many electron-hole pairs have been generated per particle per unit length:
  • - Ei critical energy for impact ionization to occur
  • - Fcr critical electric field
  • - l mean-free path for carriers
slide28

Avalanche mechanism:

EFp

EFn

EC

EV

Generation of the excess electron-hole

pairs is due to impact ionization.

Expanded view of the

depletion region

slide29

dx

  • Description of the avalanche process:

Impact ionization initiated by electrons.

Multiplication factors for

electrons and holes:

dx

Impact ionization initiated by holes.

slide30

Breakdown voltage  voltage for which the multiplication rates Mn and Mp become infinite. For this purpose, one needs to express Mn and Mp in terms of an and ap:

The breakdown condition does not depend on which

type of carrier initiated the process.

slide31

Limiting cases:

  • (a)an=ap (semiconductor with equal ionization rates):
  • (b)an>>ap (impact ionization dominated by one carrier):
slide32

Breakdown voltages:

(a) Step p+n-junction

  • For one sided junction we can make the following approximation:
  • Voltage drop across the depletion region on the n-side:
  • Maximum electric field:
  • Empirical expression for the breakdown voltage VBD:
slide33

(b) Step p+-n-n+ junction

  • Extension of the n-layer large:
  • Extension of the n-layer small:
  • Final expression for the punch-through voltage VP:
slide34

(4) AC-Analysis and Diode Switching

  • (a) Diffusion capacitance and small-signal equivalent
  • circuit
  • This is capacitance related to the change of the minority carriers. It is important (even becomes dominant) under forward bias conditions.
  • The diffusion capacitance is obtained from the device impedance, and using the continuity equation for minority carriers:
  • Applied voltages, currents and solution for Dpn:
slide35

Equation for pn1(x):

  • Boundary conditions:
  • Final expression for pn1(x):
slide36

Small-signal hole current:

  • Low-frequency limit for the admittance Y:
  • RC-constant:

The characteristic time constant is on

the order of the minority carriers lifetime.

slide38

(b) Diode switching

  • For switching applications, the transition from forward bias to reverse bias must be nearly abrupt and the transit time short.
  • Diode turn-on and turn-off characteristics can be obtained from the solution of the continuity equations:

Qp(t) = excess hole charge

Valid for p+n diode

slide39

p+

n

t=0

IF

  • Diode turn-on:
  • For t<0, the switch is open, and the excess hole charge is:
  • At t=0, the switch closes, and we have the following boundary condition:
  • Final expression for the excess hole charge:
slide40

Slope almost constant

t increasing

  • Graphical representation:
  • Steady state value for the bias across the diode:
slide41

p+

n

t=0

2

1

VF

VR

R

R

  • Diode turn-off:
  • For t<0, the switch is in position 1, and a steady-state situation is established:
  • At t=0, the switch is moved to position 2, and up until time t=t1 we have:
  • The current through the diode until time t1 is:
slide42

To solve exactly this problem and find diode switching time, is a rather difficult task. To simplify the problem, we make the crucial assumption that IR remains constant even beyond t1.

  • The differential equation to be solved and the initial condition are, thus, of the form:
  • This gives the following final solution:
  • Diode switching time:
slide43

Graphical representation:

Slope almost

constant

t=0

t=ts

ttrr

ts  switching time

trr  reverse recovery time