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Reachability Analysis

Reachability Analysis. Speaker : KJ Chang Advisor : Chun-Yao Wang Date : 2007.8.21. Outline. Introduction Approach SIS & Experimental result Conclusion & Future work. PI. Comb Of circuit. PPO. PPI. Problem:. Given a combinational part of a sequential circuit

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Reachability Analysis

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  1. Reachability Analysis Speaker : KJ Chang Advisor : Chun-Yao Wang Date : 2007.8.21

  2. Outline • Introduction • Approach • SIS & Experimental result • Conclusion & Future work

  3. PI Comb Of circuit PPO PPI Problem: • Given a combinational part of a sequential circuit • Given states that have been reached • Find out the states that will be reached in the next time frame

  4. Objective of our approach: • Fixed point • Reached states • No false negative • (no over-approximation)

  5. Outline • Introduction • Approach • Guided simulation & space issue • BDD-based & size issue • SIS & Experimental result • Conclusion & Future work

  6. New view of the problem: • Three classes of states • R. Reached states • N. Non-reached states (from initial state) • C. Conflict states R N C guided simulation conflict detection justification

  7. 2n*r r Guided simulation: • For n pi, r reached states ( 2n : 1 ) • For 1 reached state, prune 2x input pattern 2x • Lower the probability of repeated states

  8. a G5 G6 b G7 G7 c G6 d G5 Guided simulation: • X0X10X0 • Prune 8 input pattern 0 1 0 0 0 0 1 1 0 0 1 1 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0

  9. Outline • Introduction • Approach • Guided simulation & space issue • BDD-based & size issue • SIS & Experimental result • Conclusion & Future work

  10. Y Y y0 …….. yn-1 X X X I I 1 0 1 0 1 0 BDD-based Reachability Analysis: Y=δ(X,I) Existential quantification TR(Y,X) R(Y,X,I) R(Y,X,I) = (y0=δ0(X,I))^(y1=δ1(X,I))^…..

  11. BDD size issue: • BDD-based : • Transition relation TR(Y,X): 2*l • EX: s1423 74*2 = 148 • Worst case R(Y,X,I) : 2*l+n • EX: 74*2+17 = 165 • Our approach : • Input constrain BDD , I-BDD : l+n • EX: 74+17 = 91

  12. Outline • Introduction • Approach • Guided simulation & space issue • BDD-based & size issue • SIS & Experimental result • Conclusion & Future work

  13. Misunderstanding of SIS: • BDD-based, but… • SIS does not need to allocate huge memory at the beginning for R(X,Y,I) • SIS use Y=δ(X,I) to do next state computation • Memory usage of SIS would increase slightly as executing time increase • SIS does need a lot of memory for big circuit, but most of memory is for record states (just like ours)

  14. Experimental result:

  15. Problem: • We use I-BDD for Guided simulation which need a lot of memory, and SIS does not need it • The set of pruned patterns are usually complex, this makes I-BDD occupy huge memory • And frequent BDD operation of I-BDD also slow down our process • Y=δ(X,I) may be not so complex • Now we only use simulation to reach states, obviously SIS is faster • Besides simulation…

  16. Outline • Introduction • Approach • Guided simulation & space issue • BDD-based & size issue • SIS & Experimental result • Conclusion & Future work

  17. Conclusion: • The extra memory of I-BDD let us allocate more memory than SIS • Our performance (by using simulation) may be slower than SIS especially when there are a large number of reachable states

  18. Future work: • Study the source code of SIS • Find other way to speed up reachability computation (not just using simulation)

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