Computer Architecture and Operating Systems CS 3230 :Assembly Section Lecture 2

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Computer Architecture and Operating Systems CS 3230 :Assembly Section Lecture 2. Department of Computer Science and Software Engineering University of Wisconsin-Platteville. General-Purpose Registers.

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### Computer Architecture and Operating SystemsCS 3230 :Assembly SectionLecture 2

Department of Computer Science and Software Engineering

University of Wisconsin-Platteville

General-Purpose Registers
• AX(accumulator) often holds the temporary result after an arithmetic and logic operation (also addressed as EAX, AH, or AL)
• BX (base) often holds the base (offset) address of data located in the memory (also addressed as EBX, BX, BL)
• CX (count) contains the count for certain instructions such as shift count (CL) for shifts and a counter (CX or ECX) with the LOOP instruction (also addressed as ECX, CH, or CL)
• DX (data) holds
• the most significant part of the product after a 16- or 32-bit multiplication,
• the most significant part of the dividend before a division, and
• I/O port number for a variable I/O instruction (also addressed as EDX, DH, DL)
Pointer and Index Registers
• SP (stack pointer) used to address data in a LIFO (last-in, first-out) stack memory, most often used when
• the PUSH and POP instructions are executed
• a subroutine is CALLed or RETurned within a program
• Don’t ever mess with this directly
• BP (base pointer) often used to address an array of data in the stack memory
• SI (source index) used to address source data indirectly for use with the string instructions
• DI (destination index) normally used to address destination data indirectly for use with the string instructions
• IP (instruction pointer) always used to address the next instruction executed by the microprocessor
Logical vs. physical memory

Logical memory is the “view” of memory seen by the programmer

A large byte-addressable array of bytes

We can read/write bytes, words or doublewords

Physical memory

The physical organization of memory cells, which is not “visible” to the programmer

The unit of access to physical memory is equal to the width of the data bus

E.g. 16 bits in 8086, 32 bits in 80386 and later

8086 physical memory

Odd Bank

Even Bank

F

E

90

90

90

90

90

80

90

90

90

90

90

90

90

90

90

90

87

87

97

87

87

87

87

87

87

87

87

87

87

87

87

87

D

E9

E9

EA

E9

E9

E9

E9

E9

E9

E9

E9

E9

E9

E9

11

11

11

11

11

11

11

22

11

11

11

11

11

11

11

C

B

F1

F1

F1

FE

F1

F1

F1

F1

F1

F1

F1

F1

F1

54

24

24

24

24

24

24

24

24

24

24

24

A

9

01

01

01

01

01

01

01

01

01

09

C6

46

46

46

46

46

46

46

46

46

46

8

7

6

76

76

76

76

76

76

76

76

DE

DE

1A

DE

DE

DE

DE

DE

5

14

14

14

14

23

14

33

44

33

33

33

33

33

4

3

55

55

55

55

66

12

11

12

12

2

FF

FF

FF

1

AB

AB

0

Data Bus (15:8)

Data Bus (7:0)

x86 byte ordering

Memory locations 0 and 1 contain FF and AB…

But a word access from address 0 returns ABFF

x86 uses “little endian” byte order

The requested address (0) points to the lower order byte of the result

The higher order byte of the result is taken from the next higher sequential address (1)

8086 physical memory

• data(15:8)=AB,data(7:0)=FF
• This is an aligned memory access

• It is a valid memory access
• Result should be 11AB
• But the bytes in the data bus are not aligned data(15:8)=AB,data(7:0)=11

Odd Bank

Even Bank

F

E

90

80

90

90

90

90

90

90

90

90

90

90

90

90

90

90

87

87

97

87

87

87

87

87

87

87

87

87

87

87

87

87

D

E9

E9

E9

E9

E9

E9

EA

E9

E9

E9

E9

E9

E9

E9

11

11

11

11

11

11

11

11

11

11

11

11

22

11

11

C

B

F1

F1

F1

F1

F1

F1

F1

F1

F1

F1

FE

F1

F1

24

24

24

24

24

24

24

24

54

24

24

24

A

9

01

01

01

01

01

09

01

01

01

01

46

46

46

46

C6

46

46

46

46

46

46

8

7

6

76

76

76

76

76

76

76

76

DE

DE

DE

DE

DE

DE

DE

1A

5

14

14

14

14

23

14

33

33

33

33

33

44

33

4

3

66

55

55

55

55

12

11

12

12

2

FF

FF

FF

1

AB

AB

0

Data Bus (15:8)

Data Bus (7:0)

Integer Representation

Three general techniques that have been used to represent signed integers in computer memory

Signed magnitude

One’s complement

Two’s complement

All of above methods use the most significant bit of the integer as a sign bit

Signed byte can be used to represent the decimal numbers −128 to +127

Signed word can be used to represent the decimal numbers −32, 768 to +32, 767

Signed double word can be used to represent the decimal numbers −2 billion to +2 billion approximately

Integer Representation (cont.)

Signed magnitude

It represents the integer as two parts. The first part is the sign bit and the second is the magnitude of the integer

Example: +56= 00111000 (38 Hex) and -56 =10111000(B8 Hex)

One’s complement

A negative number is represented by the one’s complement of the absolute value

Example: +56= 00111000 (38 Hex) and -56 =11000111(C7 Hex)

Two’s complement (used by x86 and modern computers)

A negative number is represented by the two’s complement of the absolute value (ignore the carry bit)

Example: +56= 00111000 (38 Hex) and -56 =11001000(C8 Hex)