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Operating Systems Overview: Scheduling, Deadlocks, Threads, Processes

Explore key concepts in Operating Systems like scheduling algorithms, thread vs process differences, deadlocks, and more. Dive into important exercises and scenarios to deepen your understanding.

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Operating Systems Overview: Scheduling, Deadlocks, Threads, Processes

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  1. Christmas special - Overview • Assignment 9: hints • Scheduling • Assignment 8: solution • Deadlocks

  2. A9 Ex1 - Scheduling • 5 jobs arrive at the same time • Process turnaround time: the time elapsed from the submission of the job until the job was done

  3. A9 Ex1 - Scheduling • Compute the average process turnaround time for: • Round robin • Priority scheduling • First-come, first-served (arrival: A, B, C, D, E) • Shortest job first

  4. A9 Ex2 - Multithreading • Some kernels allow for only one execution thread • Multiple threads implemented in user-space • Describe the difference between kernel threads and user-space threads (hints: system-call cost, access to kernel structures).

  5. A9 Ex3 - Processes • What are the differences between threads and processes? • Compare the data to be saved during a context switch for: • Coroutines (Oberon) • Threads • Processes

  6. PEx1 – CSPs Process A Process B channel c c.send(msg) c.receive(msg) synchronization

  7. PEx1 - Erathostenes’ Sieve • The numbers dividable with the filter number are dropped • The other numbers are passed to the next filter • If no filter exists, create one Number Generator Filter2 Filter3 Filter5 Filter7 2 2 3 3 4 4 5 5 6 6 7 7

  8. PEx2 - How big should a TLB be? • A TLB miss requires 20 instructions • iTLB configurations • 128 entries, two-way assoc, 4-64 KB pages • 512 entries, two-way assoc, 4-64 KB pages • Use SimpleScalar simulator and one or more SPEC2000 benchmarks to calculate • Instruction TLB miss rate • Instruction TLB overhead: percentage of time wasted handling TLB misses

  9. PEx2 - How big should a TLB be? • Download SimpleScalar and the SPEC2000 binaries • Type ./sim-cache –h • Default <itlb:16:4096:4:l> = 16 sets, 4 KB pages, four-way assoc, LRU replacement • A new configuration for data TLB is set by ./sim-cache –tlb:dtlb dtlb:128:8192:4:r

  10. Christmas special - Overview • Assignment 9: hints • Scheduling • Assignment 8: solution • Deadlocks

  11. A8 Ex1 - Barrier (Java) public class Barrier { private static int N; private static int count; public Barrier(int n) { N = n; count = 0; } public void synchronized enter() { if (count++ == N) { notifyAll(); count = 0; } else { wait(); } } }

  12. A8 Ex1 - Barrier (Active Oberon) MODULE Barriers; TYPE Barrier = OBJECT VAR n, N: LONGINT; PROCEDURE Enter*; VAR i: LONGINT; BEGIN {EXCLUSIVE} i := n DIV N; INC(n); AWAIT (i < n DIV N) END Enter; PROCEDURE & Init (nofProcs: LONGINT); BEGIN N := nofProcs; n := 0 END Init; END Barrier; END Barriers.

  13. A8 Ex2 - Deadlock Avoidance • Ordering • the resources are ordered • a lock manager assigns lock using priorities (e.g. the account with the lower number gets the lock first). • Two-phase locking

  14. A8 Ex1 - Baboons • Semaphore  starvation is possible • Ticketing system • tickets are released when a process (baboon) request access to the resource (rope) • access is granted to process with tickets (in increasing order)

  15. Merry Christmas!

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