A Hybrid Architecture for Radar Processing

1. SPARC ANNAPOLIS WILDFORCE ANNAPOLIS WILDFORCE ANNAPOLIS WILDFORCE ANNAPOLIS WILDFORCE VME Annapolis System Annapolis System Mercury System PCI PCI Custom Custom PC ... ... ... PC PE PE PE PE CN CN Data Source Data Sink Reconfigurable Subsystem DSP/GPP Subsystem Reconfigurable Subsystem DRAM ASIC 120 MB/sec 120 MB/sec CN CN CN CN CN CN CN CN CN CN CN CN CN CN CN 120 MB/sec 120 MB/sec VME BACKPLANE ROUT-T Physical View of Prototype System RIN-T SPARC HARD DISK DRIVE FORCE SPARC 5V DRAM SRAM SRAM ANNAPOLIS WILDFORCE ANNAPOLIS WILDFORCE ANNAPOLIS WILDFORCE ANNAPOLIS WILDFORCE HARD DISK DRIVE MERCURY RACE MCH 9U BOARD HARD DISK DRIVE SRAM SRAM WILD ONE WILD ONE PENTIUM DRAM PENTIUM DRAM PCI MOTHER BOARD PCI MOTHER BOARD A Hybrid Architecture for Radar Processing Jack West, Hongping Li, Sirirut Vanichayobon, Seok-Hyun Ko, Jeff Muehring, John Antonio, Sudarshan DhallUniversity of OklahomaDARPA Contract No. F30602-97-2-0297 Architecture of Prototype System SAR Processing Flow STAP Processing Flow Range Compression Azimuth Processing Range Compression Doppler Filtering Weight Computation Data Transfer Range Data Transfer Range Doppler Azimuth Sectioned Convolutions Azimuth FFT Size Channel Data Transfer Overlap Kernel Size Section