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Wesley Powell, Edward Hicks, Maxime Pinchinat Ground Systems Hardware Branch (Code 566) PowerPoint Presentation
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Application of Reconfigurable Computing Technology to Multi-KiloHertz Micro-Laser Altimeter (MMLA) Data Processing. Wesley Powell, Edward Hicks, Maxime Pinchinat Ground Systems Hardware Branch (Code 566) NASA Goddard Space Flight Center Greenbelt, MD 20771 Philip Dabney

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slide1

Application of Reconfigurable Computing Technology to Multi-KiloHertz Micro-Laser Altimeter (MMLA) Data Processing

Wesley Powell, Edward Hicks, Maxime Pinchinat

Ground Systems Hardware Branch (Code 566)

NASA Goddard Space Flight Center

Greenbelt, MD 20771

Philip Dabney

Geoscience Technology Office (Code 920.3)

NASA Goddard Space Flight Center

Greenbelt, MD 20771

Presentation P17

introduction
Introduction
  • The presentation describes; (a) how reconfigurable computing technology was used to accelerate real-time data processing for the airborne MMLA instrument, and (b) the results achieved.
  • This work was performed as an IR&D project for the purpose of:
    • Develop in-house capabilities to apply reconfigurable computing on future missions
    • Define reconfigurable computing architectures to serve as a basis for future spaceborne data systems
    • Enable single-photon-counting laser altimetry on future space missions
    • Enhance capabilities of the existing airborne MicroLaser Altimeter data system

Presentation P17

mmla instrument background
MMLA Instrument Background
  • The MMLA is a single-photon-counting laser altimeter developed at NASA GSFC under the Instrument Incubator Program (IIP)
  • MMLA measures land surface features such as topography and vegetation canopy height
  • The MMLA has flown a number of times aboard the NASA P-3 aircraft acquiring data at several sites in the Mid-Altantic region
  • Key MMLA features are:
    • Very high laser fire rate (10kHz)
    • Uses very small, low energy, solid-state Micro-Laser
    • Can fly at high altitudes that don’t require special FAA clearances
    • Eye safe at ground level
    • Relatively small (10 – 20 cm) telescope
  • MMLA technology has several potential spaceflight applications

Presentation P17

mmla concept
MMLA Concept
  • Laser Fires @ 10 kHz
  • Time-of-Flight (TOF) Measured for Each Pulse
  • For Each Pulse, the TOF of up to 16 “Ranges” (Falling within the
  • Specified Range Window) is Stored
  • Returns are Binned Based on Pulse Count and Range Times
  • Most Likely Signal Path is Computed
  • Only Ranges Corresponding to Signal are Saved

Presentation P17

mmla data processing
MMLA Data Processing
  • MMLA data processing extracts signal in order to:
    • Reduce the volume of data stored (i.e. discard noise returns)
    • Provide real-time display of measured surface
  • Data processing steps
    • Bin incoming return data to construct 2-dimensional Plotdata Array
    • Select most likely signal path through Plotdata Array
  • The most likely signal path can then be displayed to show measured surface
  • Only returns falling within selected path are stored

Presentation P17

plotdata array construction

X – Horizontal Ground Track

Bins

0

0

1

0

0

1

0

0

0

0

1

0

0

3

0

2

0

0

Range

Window

Y – Vertical Range

5

0

4

0

4

5

0

1

0

6

0

2

0

0

0

1

0

0

Frames

Superframe

Plotdata Array Construction
  • Return data formatted into [t, r] pairs, where “t” is laser fire time and “r” is time-of-flight
  • Histogram performed to create 2-dimensional Plotdata Array
    • “t” elements are grouped into frames in the X dimension
    • Typical frame size is 5 ms
    • “r” elements grouped into bins in the Y dimension
    • Typical bin size is 10,000 to 100,000 ps (1 to 10 meters)
  • A Superframe is a discrete number of frames (MM) that make up a Plotdata Array

Presentation P17

signal path selection
Signal Path Selection
  • Selection is performed “brute force” by scoring every possible path through Plotdata Array
  • Paths are constrained by a “Cell Spread” parameter determining which cells can be transitioned to from a given cell (figure shows a Cell Spread of 3)
  • Each path is scored by totaling the number of returns in each cell
  • To be considered a signal path, a path must have NN of MM cells exceed a given threshold
  • The most likely signal path (if any exist) is the signal path with the highest number of returns

Presentation P17

computing demands
Computing Demands
  • The number of possible paths through a [Num_Bins x MM] array is:

Paths = Num_Bins x (Cell Spread) (MM-1)

  • For a typical [50 x 6] (bins x frames) array and a Cell Spread of 3, there are ~ 12,000 possible paths
  • With a 10 kHz laser fire rate and typical array sizes, 33 arrays must be processed every second (i.e. ~400,000 paths processed per second)

Presentation P17

mmla implementation
MMLA Implementation
  • MMLA implemented with COTS components
  • Consists of 2 racks and a transmitter/receiver assembly
  • Navigation Rack
    • Provides system time reference and aircraft altitude, attitude, and heading
    • Controls ground reference camera
  • Ranging Rack
    • Houses RGUI and RDATA computers
    • RGUI Computer (Dual Pentium 850 MHz, Windows 2000)
      • Performs signal extraction processing
      • Controls instrument and displays instrument status
      • Stores signal data
    • RDATA Computer (VXI with DOS Computer and Data Acquisition Cards)
      • Performs ranging measurements
  • Transmitter/Receiver Assembly
    • Houses laser, telescope, and optical components

Presentation P17

mmla baseline configuration
MMLA Baseline Configuration

Ranging Rack

RGUI Computer

Time

Altitude

Attitude

Heading

Laser Fire

Signals

NT

GSE

Multi-Channel

Scaler

Navigation

Rack

Signal

Processing

DLL

Control

Nat. Inst.

MXI Interface

Transmitter

Receiver

Assembly

RDATA

Computer

Nat. Inst.

MXI Interface

Ranges

Processor

Time-to-Digital

Converter

Return

Signals

Presentation P17

reconfigurable computing rc data system
Reconfigurable Computing (RC) Data System
  • Modifies existing RGUI computer
  • Annapolis Microsystems Firebird FPGA Board
    • Based on Xilinx Virtex XCV2000E FPGA
    • Includes 36 MB SRAM in 5 separately addressable banks
    • Resides on 64-bit 66 MHz PCI bus
  • Reconfigurable Computing (RC) Application
    • Operates in parallel with existing signal extraction software
    • FPGA Image performs signal extraction in hardware
    • RCIS (standalone DLL) integrates hardware processing with existing signal extraction software

Presentation P17

rc data system configuration
RC Data System Configuration

RGUI Computer

Laser Fire

Signals

Multi-Channel

Scaler

NT

GSE

Return

Signals

Signal

Processing

DLL

Control

Nat. Inst.

MXI Interface

Measured

Ranges

Time

Altitude

Attitude

Heading

Annapolis Microsystems

Firebird

8MB

SRAM

Virtex

2000E

FPGA

8MB

SRAM

RCIS

8MB

SRAM

4MB

SRAM

8MB

SRAM

Presentation P17

rc application flow
RC Application Flow

Instrument

Data

Structure

Reformat into

Firedata Array

of [t, r] Pairs

Build

Plotdata

Array

Display

Signal

Path

Path

Select

Path

Trace

Store

Signal

Returns

Performed in FPGA Image

Performed in RCIS

Presentation P17

fpga image
FPGA Image
  • Custom Modules
    • Build Plotdata Module constructs Plotdata Array
    • Path Select Module selects most likely signal path through Plotdata Array
    • Path Trace Module annotates Firedata Array ([t, r] pairs) to indicate which pairs are signal returns
    • Plotdata Memory implements the Plotdata Array in BlockRAM
    • Master Controller Module controls sequencing of the processing steps
  • Generic Annapolis Microsystems Modules
    • Register File interfaces custom modules to PCI bus
    • Memory Arbiter allows access to off-chip Firedata Memory
    • Memory Bridge interfaces Firedata Memory to PCI bus

Presentation P17

fpga image configuration
FPGA Image Configuration

Memory

Bridge

Resets

Firedata

Busses

Build

Plotdata

Module

Control

Parameters

(MM, NN,

Cell Spread,

Cell Thresh,

Etc.)

Firedata

Memory

Memory

Arbiter

Register

File

Firedata

Bus

Path

Trace

Module

PCI

Bus

Status

Start

Signals

Master

Controller

Module

Path

Select

Module

Int

Done

Signals

Plotdata

Memory

(Dual Port

BlockRAM)

Plotdata

Bus

Xilinx

XCV2000E

FPGA

Presentation P17

results
Results
  • FPGA Image
    • Uses ~ 15% of Virtex XCV2000E resources and 512 KB of off-chip SRAM
    • Operating at 74 MHz, can process ~ 1,000,000 paths per second
  • MMLA Results
    • Successfully integrated and ground tested with MMLA instrument
    • Demonstrates a performance gain of 9 over software processing
  • Benchmark Results
    • RC Application performance compared against signal extraction software routine running on a 1.2 GHz Pentium (2230 MIPS) workstation
    • Performance gain of 1.5 - 2.3 measured for large superframe sizes (MM > 7)
    • For small superframe sizes (MM < 6), software processing is faster
    • Estimated results on current spaceflight processors (based on Dhrystone MIPS ratings)
      • Performance gain of 5 – 15 on RAD750 (300 MIPS)
      • Performance gain of 50 – 150 on RAD6000 (35 MIPS)

Presentation P17

conclusion
Conclusion
  • Reconfigurable computing offers a considerable advantage over software based MMLA data processing
    • Order of magnitude performance gain demonstrated
    • Performance could be further improved by using parallelism
  • Reconfigurable computing is a viable option for use on a MMLA-based spaceflight instrument
    • Would offer a large performance gain over software running on spaceflight qualified processors
    • FPGA image would fit into flight qualified Xilinx XQVR1000 FPGA
      • Would use approximately 30% of resources
      • Sufficient room would remain to allow SEU mitigation techniques

Presentation P17

acronym list
Acronym List

DLL Dynamic Link Library

GSFC Goddard Space Flight Center

FPGA Field Programmable Gate Array

IIP Instrument Incubator Program

IR&D Internal Research and Development

MIPS Million Instructions Per Second

MMLA Multi-KiloHertz Micro-Laser Altimeter

NASA National Aeronautics and Space Administration

RDATA Range Data Computer

RGUI Ranging Graphical User Interface Computer

SRAM Static Random Access Memory

TOF Time of Flight

Presentation P17