ILC GDE Meeting Feb.6,2007

ILC GDE MeetingFeb.6,2007 LLRF • - Stability requirements and proposed llrf system • Typical rf perturbations • Achieved stability at FLASH • - R&D items • - Schedule • - Other comments Shin Michizono

Stability Requirements for Main Linac Summary of tolerances for phase and amplitude control. These tolerances limit the average luminosity loss to <2% and limit the increase in RMS center-of-mass energy spread to <10% of the nominal energy spread. Ref. Mike Church

LLRF system configuration at ILC All electronics are located at service tunnel Vector-sum control of 26 cavities Total 26x3+6=84ch RF monitors

LLRF Rack Detail

FB algorithm 26x In the case of proportional control Output = Gain*Error+FF -> Sufficient dynamic overhead is necessary at high gain operation (>50) 26x

Klystron operation point and overhead 16.5% for llrf control* 7% rf distribution loss 76.5% for cavity input *neglect all other factors such as HV ripple @31.5 MV/m operation, llrf overhead is <16.5% in power (8.25% in amplitude) @33 MV/m operation, overhead becomes 11% in power -> It is used for fluctuation compensation, detuning compensation and so on. Extra rf drive (Gx(error)) is necessary at FB. Proportional FB gain is limited around 80 (when we can pick-up 0.1% error). And the error can be suppressed 1/G=1/80

Sources of Perturbations

Typical Parameters in a Pulsed RF System

Lorentz Force detuning compensation Detuning of 30 Hz require additional 2% rf power.

Microphonics From Thesis of Thomas Schilcher

Suppression of fluctuations by FB *When the system can detect 0.1% error. **only FF Larger dynamic overhead is desired forthe larger FB gain.

Field Regulation at FLASH By T. Schilcher

R&D items • FPGA board development having >26 ADCs • RF field stabilities <0.5% in amplitude and <0.24 deg. in phase • Crate evaluation (VXI, ATCA, ….) • Redundancy, board size • Software development • Feedback algorithm • Klystron linearization • Exception detection and handling • Warnings and alarms • High IF study

DESY SIMCON3.1 Controller

Real time intelligent diagnostics by DSP board Output max RF off (by diagnostics in DSP) Quench etc. Custom FPGA board : Mezzanine card of the commercial DSP board 10 16bit-ADCs and 2DACs + 2Rocket IO 40 MHz clock Commercial DSP board (Barcelona) (same to J-PARC system) :4x TI C6701 DSPs Can access to FPGA like an external memory of DSP FPGA & DSP boards @KEK 10 16bit-ADCs FPGA 2DACs

R&D: Proposal of IF mixture Now, the number of ADCs in a FPGA board is limited due to the substrate. (maybe ~15 with 16 layers in substrate) The idea is based on the ‘digital radio’ and obtaining cavity signals with a ADC. Over-sampling: IF 8 MHz & 12 MHz with 48 MHz sampling -> include averaging effect ->increase resolution Mixture of two signals decrease the resolution of analog signals but averaging increases the resolution. Cavity signals do not change during averaging (due to high Q values) →Enough IF separation

Schedule • Support for (test) facilities (XFEL,SMTF,STF) • Crate evaluation • FPGA board development having >26 ADCs. • Software development • High IF study

Rf distribution error v.s. max. cavity gradient in case of the 2 cavities 10% error in loaded Q induces 4% higher cavity field 10% error in rf distribution induces 8.5% higher cavity field Only rf distribution variation Although Ql and RF distribution ratio control can helpful for flattening each cavity field, This does not work without beam condition. And some residual errors exist due to the imperfect setting. Examples: 5%pk-pk Ql variation + 0.2dB (2.3%)pk-pk distribution variation -> 2%+2%=4% cavity field overshoot 31.5*1.04=32.8 MV/m 10%pk-pk (1.7%rms)+0.07dBrms (4.6%pk-pk) -> 8% overshoot 34 MV/m

Limitation of coupling adjustment method Vector sum Lower cavity Coupling adjustment method does not work at no-beam condition. In order to satisfy both beam/no-beam condition, complex technique (including detuning control) will be necessary. By Julien Branlard

ILC GDE Meeting Feb.6,2007