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EECE 374: Microprocessor Architecture and Applications Chapter 1 (Part II)

EECE 374: Microprocessor Architecture and Applications Chapter 1 (Part II). Agenda (Chapter 1, Part II). Part II – 1. Number System Part II – 2. ALU Arithmetic Operations Integer, Floating-Point number ADD, SUB, MUL, DIV Logical Operations AND, OR, NOT, XOR, etc. Shift Operations Logical

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EECE 374: Microprocessor Architecture and Applications Chapter 1 (Part II)

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  1. EECE 374: Microprocessor Architecture and ApplicationsChapter 1(Part II)

  2. Agenda (Chapter 1, Part II) • Part II – 1. Number System • Part II – 2. ALU • Arithmetic Operations • Integer, Floating-Point number • ADD, SUB, MUL, DIV • Logical Operations • AND, OR, NOT, XOR, etc. • Shift Operations • Logical • Arithmetic

  3. Number System • Radix r number (radix = 2, 8, 10, 16, etc.) • Complement • To represent negative data, we use Radix or Radix-1 complement • Radix complement of A = rN - A • Radix-1 complement of A = (rN -1) - A

  4. Number System • Example

  5. Binary Codes • Binary Codes (radix = 2) • Unsigned number: • No sign bit. • N bits binary code: 0 ~ 2N-1 • Signed number: • MSB is sign bit. • 1’s complement, 2’s complement

  6. Binary Codes • 1’s complement • Positive : same as unsigned number • Negative : invert every bit • 2’s complement • Positive : same as unsigned number • Negative : invert every bit, and add 1 • Example – 8bit binary code

  7. Binary Codes • Sign-bit extension : • Positive : fill left with 0 • Negative : fill left with 1 • Example : 4bit  8bit • 5 : 0101b  0000 0101b • -5 : 1011b  1111 1011b

  8. Binary Codes • Fast Conversion radix 2  8,16, radix 10  2 • regard 3bits in binary as 1 digit of octal number. • regard 4bits in binary as 1 digit of hexadecimal number. (cf. BCH)

  9. Computer Data Formats • ASCII (text p36 Table1-8) • A way to represent alphanumeric character • 7bit code (128 characters) • Extended ASCII : 8bit code • Unicode • 16bit code • Can represent more characters than ASCII code. • BCD (Binary-Coded Decimal)

  10. Computer Data Formats Example : Character printing by using ASCII code

  11. Computer Data Formats • Byte-Sized Data • 8bit data (00H ~ FFH) • Unsigned byte • Signed byte

  12. Computer Data Formats • Word-Sized Data • 16bit data (0000H ~ FFFFH) • Little Endian(Intel), Big Endian • 1234H

  13. Computer Data Formats • Doubleword-Sized Data • 32bit data (00000000H ~ FFFFFFFFH) • 12345678H

  14. Real Number (Floating point)

  15. Agenda (Chapter 1) • Part II – 1. Number System • Part II – 2. ALU • Arithmetic Operations • Integer, Floating-Point number • ADD, SUB, MUL, DIV • Logical Operations • AND, OR, NOT, XOR, etc. • Shift Operations • Logical • Arithmetic

  16. ALU • What is ALU? • Arithmetic and Logical Unit • Arithmetic Operation • Integer, Floating-point number • Logical Operation • Binary data(0, 1)

  17. Components of a ALU Arithmetic Op. Input Data Logical Op. Input Data Complement Unit Output Data Flags Shift Reg. Control Signals Flag Reg.

  18. Ways to represent Negative Number • Signed-magnitude • MSB is sign-bit, and MSB-1 ~ LSB are magnitude. • 1’s Complement • Neg. number with 1’s complement • 2’s Complement • Neg. Number with 2’s complement

  19. Logic Operations • AND, OR, NOT, XOR, selective-set, selective-complement, mask, insert, compare, etc. • Bitwise operation • Example ) A = 1011 0101, B = 0011 1011 • A AND B = 0011 0001

  20. Shift Operation Circular Shift Logical Shift • It can be used to send data. (serial) 0 0

  21. Shift Operation Scheme of logical shift register CLK 0 0 Right Sift Left Sift L R

  22. Shift Operation • Arithmetic shift • Same as Logical Shift except MSB. • Reason? 0

  23. Arithmetic Op. (Integer)

  24. Arithmetic Op. (ADD) • Addition : • Made up with full-adders (# of FA = # of bits) • Add two input data • What is “Overflow” ?

  25. Arithmetic Op. (ADD) • Overflow V = C4 XOR C5 Scheme of Parallel Adder

  26. Arithmetic Op. (SUB) • Subtraction : • Can be converted into the sum of two integers.

  27. Arithmetic Op. (SUB) B reg. • Subtracter = Adder + Complement unit Complement Select Signal ( +, - ) Parallel Adder Carry Sum A reg.

  28. Arithmetic Op. (MUL) • A, B : n bits binary number C = A * B, C : ~2n bits binary number • Shift and Add

  29. Arithmetic Op. (MUL) Start • Booth Algorithm • It can be used to multiply any combination of negative or positive number. A  0, Q-1  0 M  multiplicand, Q  multiplier, Cnt  n 01 10 Q0, Q-1 A  A - M A  A + M 11, 00 Right Shift A,Q, Q-1 Cnt  Cnt -1  Arithmetic right shift no yes Cnt = 0 ? End

  30. Arithmetic Op. (DIV) • D ÷ V = Q … R • D : dividend, V : divisor, Q : quotient, R : remainder • Division can be made up with series of shift and add operations.

  31. Arithmetic Op. (DIV) Start Flow chart of Unsigned n-bit number division - Q in the Q reg. - R in the A reg. A  0, M  divisor, Q  dividend, Cnt  n Left Shift A, Q A  A - M Q0  0 A  A + M no yes A < 0 ? Q0 1 Cnt  Cnt -1 no yes Cnt = 0 End

  32. Floating Point • N = (-1)S 2E-127 (1.M) : single-precision • N = (-1)S 2E-1023 (1.M) : double-precision • Overflow • Negative/Positive overflow/underflow • NAN (not a number) • Divide by zero • Square root of a negative number • M≠0 and E=FFH or E= 7FFH

  33. Floating Point (ADD, SUB) • By shift the smaller input, make two input’s exponent be same. • Why we shift the smaller one? 1.001001 ×26

  34. Floating Point (Pipelining) N1 N2 • Pipelining can be used to speed-up ALU operation. Shift Op. Step 1 Add mantissa Step 2 normalize Step 3 N1 + N2

  35. Floating Point (MUL, DIV) N1 N1 N2 N2 Multiply two mantissas Divide two mantissas Step 1 Step 1 Add two exponents Subtract two exponents Step 2 Step 2 normalize normalize Step 3 Step 3 N1 × N2 N1 ÷ N2

  36. Floating Point (MUL, DIV) • Exponent overflow • Set result +∞ or -∞ • Exponent underflow • Set result 0 • Mantissa underflow • Rounding • Mantissa overflow • Realignment

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