'Readout chips' presentation slideshows

The FVTX detector in PHENIX

The FVTX detector in PHENIX. Forward Silicon Vertex Detector, one of a number of detector upgrades. Hubert van Hecke, Los Alamos National Laboratory for the PHENIX collaboration. Vtx (Mannel) Fvtx (HvH) RPC (Wei) TOF (Belmont) RPC gas (Wood) RPC (Kim) RPC (Meredith) Computing (Love).

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349 views • 22 slides

Building Pixel Detector Modules in Multi Chip Module Deposited Technology

330 views • 21 slides

IST Status

IST Status. Gerrit van Nieuwenhuizen IST-MIT meeting BNL, July 24, 2008. 1. IST FY08 R&D Prototyping. APV25-S1. Carbon-Carbon. CF Ladder. FY08 IST prototype module. PHOBOS IV sensors. PrePrototype. Kapton hybrid-cable. 2. Gerrit van Nieuwenhuizen. IST FY08 prototype top view. 3.

294 views • 18 slides

Dicing of APV Readout Chips for FGT & IST

Dicing of APV Readout Chips for FGT & IST. Gerrit van Nieuwenhuizen FGT meeting BNL, February 27, 2009. Number of chips needed. FGT: 600 chips (50% spares, 40% cont.) IST: 1800 chips (10% spares, 40% cont.) 2400 APV25-S1 chips to procure. 2. Gerrit van Nieuwenhuizen. February 27, 2009.

205 views • 11 slides

Foundry Characteristics

388 views • 10 slides