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Robust FPGA Resynthesis Based on Fault-Tolerant Boolean Matching

Robust FPGA Resynthesis Based on Fault-Tolerant Boolean Matching. Yu Hu 1 , Zhe Feng 1 , Lei He 1 and Rupak Majumdar 2 1 Electrical Engineering Dept., UCLA 2 Computer Science Dept., UCLA Presented by Yu Hu. Address comments to lhe@ee.ucla.edu. Outline. Background and Motivation

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Logic masking - PowerPoint PPT Presentation

Robust FPGA Resynthesis Based on Fault-Tolerant Boolean Matching