Gate array design - PowerPoint PPT Presentation

ECE260B – CSE241A Winter 2005 Routing

ECE260B – CSE241A Winter 2005 Routing. Website: http://vlsicad.ucsd.edu/courses/ece260b-w05. Slides courtesy of Prof. Andrew B. Kahng. Routing Region Definition. Placement Improvement. Global Routing. Cost Estimation. Routing Region Ordering. Routing Improvement. Detailed Routing.

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Gate array design

Gate array design. Use a sea of basic transistors (pmos/nmos) or gates (NAND/NOR) • Can have cells which can provide a universal logic function • Just need to add signal routing – only a few masks Advantages : • Reduced design time • Less chance of errors • Reduced production costs

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437 views • 24 slides

Gate array design

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610 views • 24 slides

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