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111 Single Cycle CPU

111 Single Cycle CPU. ENGR 3410 – Computer Architecture Mark L. Chang Fall 2006. Computer. Processor. Memory. Devices. Control. Input. Datapath. Output. Datapath &amp; Control. Readings 5.1-5.4 Datapath: System for performing operations on data, plus memory access.

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CSCE 212 Chapter 5 The Processor: Datapath and Control

CSCE 212 Chapter 5 The Processor: Datapath and Control. Instructor: Jason D. Bakos. Goal. Design a CPU that implements the following instructions: lw, sw add, sub, and, or, slt beq, j. Datapath. Instruction Fetch Datapaths. PC &lt;= PC + 4 Read_address &lt;= PC. Register File and ALU.

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