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Lecture on High Performance Processor Architecture ( CS05162 )

Lecture on High Performance Processor Architecture ( CS05162 ). Review of Memory Hierarchy. An Hong han@ustc.edu.cn Fall 2009 School of Computer Science and Technology University of Science and Technology of China. Quick review of everything you should have learned.

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CMP 301A Computer Architecture 1 Lecture 2

CMP 301A Computer Architecture 1 Lecture 2. Outline. Direct mapped caches: Reading and writing policies Measuring cache performance Improving cache performance Enhancing main memory performance Flexible placement of blocks: Associativity Multilevel caches. Read and Write Policies.

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Lecture on High Performance Processor Architecture ( CS05162 )

CMP 301A Computer Architecture 1 Lecture 2