'500 mhz sine wave' presentation slideshows

First results from the DRS4 waveform digitizing chip

First results from the DRS4 waveform digitizing chip. Stefan Ritt Paul Scherrer Institute, Switzerland. 3 ps Timing with the DRS series ASICs. Stefan Ritt Paul Scherrer Institute, Switzerland. Requirements. High Sampling Speed. SNR > 12 bit. ps Timing Jitter.

640 views • 49 slides