Ensuring Correctness of Analog Circuits Using Pattern Matching

1. Ensuring Correctness of Analog Circuits Using Pattern Matching Rajeev Narayanan, Alaeddine Daghar, Mohamed H. Zaki, and Sofiène Tahar Hardware Verification Group, Dept. Of ECE, Concordia University, Montreal, Canada

2. Motivation Infinite State Space Analog Design Technology Variation Inheritance / Interactive Noise Non-Linearity Combination of traditional and new verification strategies are needed

3. Outline • Simulation Based Methods • Pattern Matching • Longest Common Subsequence (LCS) • Longest Closest Subsequence (LCSS) • Proposed Methodology • Applications • Colpitts Oscillator • Rambus Ring Oscillator • Conclusion and Future Work

4. State of the Art - Simulation Behavioral Level Circuit Level Statistical Modeling + Monte-Carlo Simulation • Pros: • Easy to Integrate • Fast • Cons: • Defining Complex Monitors • Accuracy of the Behavioral Model • Pros: • Accurate • Technology Aware • Cons: • Simulation Run-Times • Difficult to Automate

5. Question? For different Monte-Carlo trials, if the simulation of the non-ideal circuit follows the output of an ideal circuit for say 99.0% and violates just 1.0% of the simulation time, ``Does the designer have to reject the circuit entirely?'' Pattern Matching Algorithm # of Closely Matched Sequence

6. Longest Common Subsequence (LCS) Given two sequences X[1..m] and Y[1..n], find a longest subsequence that is common to X and Y. One-to-One Mapping A B C B D A B B D C A B A Y(1:n) n= 6 X(1:m) m= 7 • One-to-One mapping is NOT possible for Analog Circuits • Closely Matching Sequence for a given tolerance level Longest Closest Subsequence (LCSS) BCBA = LCS(X,Y) Run Time = O(n*2^m)

7. Longest Closest Subsequence (LCSS) LCSS(X,Y) C[i,j] = C[i-1, j-1] + 1; (X𝑚-p) ≤ Y𝑛 ≤ (X𝑚+p) max{C[i, j-1], C[i-1, j]}; otherwise Recursive Method Brute-Force Method • If 𝑌𝑛 ≤ (𝑋𝑚 +p) and 𝑌𝑛 ≥ (𝑋𝑚 -p), then 𝑍𝑘 is an LCSS of 𝑋𝑚 and 𝑌𝑛 • If 𝑋𝑚 ≠ 𝑌𝑛 , then, if Zk ≠ Xm , then 𝑍𝑘 is an LCSS of 𝑋𝑚-1 and 𝑌𝑛 • If 𝑋𝑚 ≠ 𝑌𝑛 , then, if Zk ≠ Yn , then 𝑍𝑘 is an LCSS of 𝑋𝑚 and 𝑌𝑛-1 Computing the Length of LCSS Optimal Path Finder Worst-Case Run-Time = O(nm)

8. Example – Chuas Circuit • LCSS perform “Set-by-Set” matching rather than “Value-by-Value” basis (Advantage during Monte Carlo Simulation) • Efficient with offsets and signal with different origins • Matching Percentage: 81.2% • Run-Time Brute-Force: 1.01 sec Recursive: 0.49 sec

9. Dealing with Offset Conditions • Start-up Delay Time • Drift in Time Axis • Ex: PLL Lock Time • Horizontal Offset • Shift of the entire signal • Ex: Jitter Period Question: How to verify such circuits that have offsets? Or Can we detect these offsets automatically?

10. Proposed Methodology

11. LCSS Based Offset Detection

12. Application – Colpitts Oscillator • Voltage divider made by C1 and C2 causes oscillation • L, C1 and C2 determine the frequency of oscillation

13. LCSS Computational Results • One ideal and Seven different Colpitts Oscillator Circuit • Monte-Carlo Simulation of 1000 trials

14. Rambus Ring Oscillator Greenstreet et.al, Question: What is the probability that the circuit will have the fastest start-up delay time and what is the “trade-off”? (Needed for PLL!!!)

15. Parametric Analysis Initial Condition = 1V • Sweep “r” and initial condition • Components Values are fixed at a given time • Not realistic – Follow MonteCarlo Simulation

16. MonteCarlo Simulation • M = 100 trials

17. What is the Trade-off? • 38 out of 100 circuits have 67% matching and has fastest start-up delay time (Initial Condition - 1V)

18. Conclusion and Future Work hvg.ece.concordia.ca • Methodology based on pattern matching for analog circuits • LCSS based on variable simulation step-size • Frequency Offsets • Hypothesis Testing Thank You!