1 / 2

Fall 2003 - EE5319/EE4328 Homework 2-1 (all homeworks don’t request to turn in)

Reference HW1, write VHDL models and a simple test bench for following problem. Use type Std_Logic for all signals; All reset should be asynchronous. Then run simulation on ModelSim and compare the waveforms. 1. Model the schematic shown:.

saburo
Download Presentation

Fall 2003 - EE5319/EE4328 Homework 2-1 (all homeworks don’t request to turn in)

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Reference HW1, write VHDL models and a simple test bench for following problem. Use type Std_Logic for all signals; All reset should be asynchronous. Then run simulation on ModelSim and compare the waveforms. 1. Model the schematic shown: Fall 2003 - EE5319/EE4328 Homework 2-1 (all homeworks don’t request to turn in) P "and" D1 Q1 Q2 Clk Rst B. Show waveforms for Q1, Q2, D1, P and Rst by hand first. Assume Rst is same width of one clock period. Clk Q1 Q2 D1 P Rst .

  2. Y Fall 2003 - EE5319/EE4328 Homework 2-2 (all homeworks don’t request to turn in) • 2. Write a VHDL model for the following schematic (use type Std_Logic for all signals). Could you write more than one VHDL coding styles (there are more than one way to express the logic)? A D "nor" B "nand" E "or" C • 3. Using CSA (Concurrent Signal Assignment) to write a VHDL model for the following schematic (use type Std_Logic for all signals). D(0) D(1) X D(2) D(3) Sel(0) Sel(1) .

More Related