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Superscalar Pipelines. Erik Feineis Chris Ielmoni Talal Abdulhaq. Overview. Limitations 1. Problem with Rigid Scalar Pipelines 2. From Scalar to Superscalar Pipelines Organization 1. Parallel 2. Diversified 3. Dynamic Design 1. Instruction Fetching 2. Instruction Decoding

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superscalar pipelines

Superscalar Pipelines

Erik Feineis

Chris Ielmoni

Talal Abdulhaq

overview
Overview
  • Limitations

1. Problem with Rigid Scalar Pipelines

2. From Scalar to Superscalar Pipelines

  • Organization

1. Parallel

2. Diversified

3. Dynamic

  • Design

1. Instruction Fetching

2. Instruction Decoding

3. Instruction Dispatching

4. Instruction Execution

5. Instruction Completion & Retiring

limitations from scalar to superscalar
[ Limitations ]From Scalar to Superscalar
  • Parallel Pipelines

- Wide pipelines

- Advance multiple instructions per cycle

  • Diversified Pipelines

- Multiple functional unit types

- Mix of different functional units

  • Dynamic Pipelines

- Out of order execution

- Distributed functional units

design instruction fetching
[ Design ]Instruction Fetching
  • Objective: Maximize Instruction Throughput
  • Possible Problems

- Misalignment of the fetch group in instruction cache

- Branch instructions within the fetch group

  • Solutions

- Static alignment at compile time

- Dynamic alignment at run time

- Branch prediction and speculation

design instruction decoding
[ Design ]Instruction Decoding
  • Primary Tasks

- Identify individual instructions

- Determine instruction types

- Detect inter-instruction dependences

  • Important Factors

- Instruction set architecture

- Width of parallel pipeline

design instruction dispatching
[ Design ]Instruction Dispatching
  • Parallel Pipeline

- Centralized instruction fetching

- Centralized instruction decoding

  • Diversified Pipeline

- Distributed instruction execution

design instruction execution
[ Design ]Instruction Execution
  • Current Trends

- More parallelism

- Deeper pipes

- More diversity

  • Key Functional Units

- Integer units

- Floating-point units

  • Other Functional Units

- Branch units

- Load/Store units

- Specialized units (image, graphic, video, DSP)

  • Current Challenge

- Load/Store parallel processing

design instruction completion retiring
[ Design ]Instruction Completion / Retiring
  • Out-of-order execution

- ALU instructions

- Load/store instructions

  • In-order completion/retiring

- Precise exception

- Memory consistency

  • Solutions

- Reorder buffer (in-order completion)

- Store buffer (in-order retiring)

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