slide1 n.
Download
Skip this Video
Download Presentation
2004-Apr-21 JaeYeong Kim

Loading in 2 Seconds...

play fullscreen
1 / 10

2004-Apr-21 JaeYeong Kim - PowerPoint PPT Presentation


  • 88 Views
  • Uploaded on

Chap. 9 Shallow Trench Isolation (STI). 2004-Apr-21 JaeYeong Kim. STI Process Flow. Pad Oxidation Thermally grown oxide (typically 10~20nm) on bare silicon To prevent stresses by pad nitride

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about '2004-Apr-21 JaeYeong Kim' - preston-puckett


Download Now An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
slide1

Chap. 9

Shallow Trench Isolation (STI)

2004-Apr-21

JaeYeong Kim

slide2

STI Process Flow

  • Pad Oxidation
    • Thermally grown oxide (typically 10~20nm) on bare silicon
    • To prevent stresses by pad nitride
      • If pad nitride deposited directly on bare silicon, then nitride stress can cause defect in silicon substrate.
      • Relatively lower stress than LOCOS, lower thickness than LOCOS
  • Pad Nitride Deposition
    • Role of pad nitride
      • Hard mask for etching of trench
      • CMP polish-stop-layer for planarization after trench fill by CVD oxide

Pad Nitride

Pad Oxide

Silicon Substrate

Silicon Substrate

slide3

STI Process Flow

  • STI Photo
    • STI field area will be open
  • Nitride and pad oxide etch
    • Anisotropically etched using plasma etching process
  • Trench Etch (Silicon)
    • Using plasma etch
    • Goals of etch process
      • Correct depth : without etch stop layer  time etch
      • Desired sidewall slope : more vertical
      • With rounded bottom corner
      • Smooth sidewall and minimum Si damage
  • Photo resist can be stripped after or before

PR

Silicon Substrate

slide4

STI Process Flow

  • Undercut of pad oxide with HF dip
    • To make top corner rounding during liner oxidation
  • Liner Oxidation
    • Role of liner oxide
      • Remove residual damage caused by plasma etch process
      • Passivate Si surface of trench
        • provide stable interface between Si and trench fill oxide

for higher threshold voltage of parasitic field transistor, lower leakage current

      • Top corner rounding of active region
        • After trench etch, top corner has sharp corner.
        •  Making rounded top corner by liner oxidation

Under Cut

Liner Oxide

slide5

STI Process Flow

  • Gap fill of trench by CVD oxide deposition
    • Without void
    • LPCVD TEOS, APCVD, HDP CVD Oxide
  • Densification
    • To make less field loss during wet etch and cleaning step
  • Reverse active photo and RIE etch

Liner Oxide

slide6

STI Process Flow

  • STI CMP
  • Nitride strip
    • HF + hot phosphoric acid
    • HF step is to remove oxynitride layer grown during liner oxidation
    • Using wet process for nitride removal
      • Inexpensive and high selectivity than dry etch
      • Need to remove backside nitride deposited during pad nitride deposition
  • Using remained pad oxide as buffer oxide for well implant
  • Or strip remained pad oxide and grow sacrificial oxide as buffer oxide

Liner Oxide

slide7

Kooi Effect

  • Trench oxide is densified in O2 ambient, then O2 react with residual H2 in trench oxide or nitride film and form H20.
  • H2O react with Si3N4 to form NH3.
  • NH3 diffuse through oxide and react with Si substrate.
  • Form silicon nitride spot or white ribbon.
  • gate oxide thinning problem on nitrided region
  • GOI problem

 Kooi Effect

: To prohibit Kooi effect, growing sacrificial oxide after removal of pad oxide

Si3N4 + H2O  SiO2 + NH3

Si+NH3 Si3N4 + H2

Si

slide8

1.E+00

1.E-02

0

1.E-04

1.1

1.E-06

Id [A]

2.2

1.E-08

3.3

1.E-10

4.4

1.E-12

1.E-14

-0.5

0.5

1.5

2.5

3.5

Vg [V]

1.E+00

1.E-02

0

1.E-04

1.1

1.E-06

Id [A]

2.2

1.E-08

3.3

1.E-10

4.4

1.E-12

1.E-14

-0.5

0.5

1.5

2.5

3.5

Vg [V]

Top Corner Rounding

  • Sharp top corner
    • Enhance electric field at corner  lowering threshold voltage
    • Degrade turn-off characteristics : large off current
    • Parasitic double “hump” characteristics in IDS-VGS curves
  • To prohibit of hump characteristics, top corner rounding is needed.
  • Technique for top corner rounding
    • Adding HCl gas to dry oxidation
    • High temperature dry oxidation 1050~110C
    • Mini LOCOS process
    • H2 annealing after trench etch

With corner rounding

Without corner rounding

slide9

Trench Fill Process

  • Criteria of CVD material for trench fill
    • Void-free
    • comparable etch rate with thermal oxide
    • Film stress, shrinkage and composition after high temperature anneal
    • CMP polish rate relative to nitride and uniformity
    • Isolation characteristics of N+/PW and P+/NW diode
  • HDP CVD
    • Good gap-filling capability by dep & etch process
    • Deposition with silane gas and etch with Ar ions
    • High density plasma density with low pressure to obtain directionality for good gap filling

45 degree facets

slide10

Inverse Narrow Width Effect

  • In case of LOCOS isolation, threshold voltage is increased as active width become narrower.

 Narrow width effect (NWE)

  • For STI Isolation, threshold voltage is decreased as active width become narrower.

 Inverse Narrow effect (INWE)

    • Decrement can be controlled by amount of field recess at active edge.
ad