240 likes | 369 Views
Alexander Kamkin and Dmitry Vorobyev Institute for System Programming of RAS. An Approach to Test Programs Generation for Microprocessors Based on Pipeline Hazards Templates. Designing and Testing of microprocessors. Cost of missed in the chip errors may be very high
E N D
Alexander Kamkin and Dmitry Vorobyev Institute for System Programming of RAS An Approach to Test Programs Generation for Microprocessors Based onPipeline Hazards Templates
SYRCoSE'2010 Designing and Testing of microprocessors • Cost of missed in the chip errors may be very high • The most of errors occur in the functionality • Verification efforts may reach to 80% of all designing efforts • Testing is carried out at all design stages
SYRCoSE’2010 Control logic and pipeline • Control logic is internal functionality responsible for controlling instructions executions • Classic pipeline • Instruction Fetch • Instruction Decode • Execute • Memory Access • WriteBack
SYRCoSE'2010 Complex pipeline situations Ideal Processing I1 IF ID EX MA WB I2 IF ID EX MA WB I3 IF ID EX MA WB I4 IF ID EX MA WB I5 IF ID EX MA WB Clock cycle Instruction Pipeline processes without any idle
SYRCoSE'2010 Complex pipeline situations Structural Hazard I1 IF ID EX MA WB I2=ADD IF ID EX MA WB I3 IF ID EX MA WB I4=ADD IF ID EX MA WB I5 IF ID EX MA WB Clock cycle Instruction The same unit is used in instructions
SYRCoSE'2008 Complex pipeline situations Data Hazard I1 IF ID EX MA WB I2=ADD IF ID EX MA WB I3=SUB(Dep.) IF ID EX MA WB I4 IF ID EX MA WB I5 IF ID EX MA WB Clock cycle Instruction Data is used before it is available
SYRCoSE'2008 Complex pipeline situations Control hazard I1 IF ID EX MA WB I2 IF ID EX MA WB I3=J IF ID EX MA WB I4 xIF xID xEX xMA xWB I5 xIF xID xEX xMA xWB Clock cycle Instruction Branch instruction leads to jump
SYRCoSE'2010 Complex pipeline situations Exception raises I1 IF ID EX MA WB I2 IF ID EX MA WB I3 IF ID EX MA WB I4=SB IF ID EX MA WB I5 xIF xID xEX xMA xWB Clock cycle Instruction Exception raises when accessing to memory
SYRCoSE'2008 Techniques of the control logic testing • Cycle-accurate techniques • High testing coverage • Inexpediency/impossibility of use at early designing stages • Template-based techniques • Coverage is unsystematic and difficult for evaluation • Can be used at the different stages
SYRCoSE'2010 Techniques of the control logic testing • Cycle-accurate techniques • High testing coverage • Inexpediency/impossibility of use at early designing stages • Template-based techniques • Coverage is unsystematic and difficult for evaluation • Can be used at the different stages • Our approach • Using of models gives systematic for coverage • Using of the generalized pipeline hazards templates that allows using at different stages Gap in designing process
SYRCoSE'2010 Foundations of the approach (1) • Approach uses formal specifications of microprocessor ISA • Structure of the test program • Test = {<Prei, Actioni, Posti>}i=0,n-1, • Using test templates to represent test action instead of concrete test actions • Specifying formally test situations • Specifying formally dependencies
SYRCoSE'2010 Foundations of the approach (2) • Test situations describe necessary parameters of testing component • Dependencies between instructions • Register dependencies • Address dependencies • Test program are generated automatically by combining test situations and test dependencies
SYRCoSE'2010 The suggested approach • Highlight “interesting situations” in pipeline functioning • Produce generalized specifications (basic templates) for each type of hazard • Define parameters for simple test actions • Define parameters for composite test actions using operations over basic templates • Generate tests using templates
SYRCoSE'2010 Generalized Specifications of Hazards Generalized Templates Parametrized Generalized Templates
SYRCoSE'2010 Generalized Specification of Exceptions $PreInstructions $ExceptionInstruction @ExceptionType $PostInstructions
SYRCoSE'2010 Generalized Specification of Exceptions $PreInstructions: {dadd} $ExceptionInstruction @ExceptionType {TLBInvalid} $PostInstructions {daddiu} dadd r25, r30, r7 lb r22, 0(r4)// TLBInvalid=true daddiu r5, r18, 13457 How may Basic Template be translated to the test action?
SYRCoSE'2010 Generalized Specification of Data Hazards $PreInstructions $FirstInstruction $InnerInstructions $SecondInstruction @Dependency $PostInstructions
SYRCoSE'2010 Generalized Specification of Data Hazards $PreInstructions: {} $FirstInstruction: {madd.s} $InnerInstructions: {add.s} $SecondInstruction @Dependency {register: write-write} $PostInstructions: {div.s} madd.s $f18, $f6, $f28, $f10 add.s $f8, $f17, $f3 ceil.l.s $f2, $f18 // Data hazard div.s $f23, $f13, $f24 How may Basic Template be translated to the test action?
SYRCoSE'2010 Test Program Generation • Simple test actions • Basic templates of a single situation with parameters describes situation • Composite test actions • Operations over Basic Templates define parameters for composite situations
SYRCoSE'2010 Operations for Composite Test Actions • Overlapping: T=TH1|TH2 • Shift: TH=TH1↓TH2 • Concatenation: T=T1→T2 • Nesting: TH=TH1[T]
SYRCoSE'2010 Example of the Operation • Using overlapping operation for data hazard and structural hazard: • $FirstInstruction1:{add.s, div.s} • $FirstInstruction2:{mul.s, div.s} • $FirstInstruction = $FirstInstruction1 ∩ $FirstInstruction2 • $SecondInstruction = $SecondInstruction1 ∩ $SecondInstruction2 … div.s$f18, $f6, $f28, $f10 add.s $f8, $f17, $f3 div.d $f2, $f18 // Data hazard and Structural hazard div.s $f23, $f13, $f24
SYRCoSE'2010 Case study • The approach was applied to verification of two arithmetical coprocessors: • Floating point coprocessor • Complex arithmetic coprocessor
SYRCoSE'2010 Future work • Extend approach using accurate-cycled models
SYRCoSE'2010 Thank You!Questions?