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ECE 447 Fall 2009

ECE 447 Fall 2009. Lecture 10: TI MSP430 Timers and Capture Modes. Timer_A Overview. Timer Block The core, based on 16-bit register TAR Can chose sources for clock and freq division Timer block has no output Flag TAIFG is raised when counter returns to 0 Capture/compare channels

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ECE 447 Fall 2009

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  1. ECE 447 Fall 2009 Lecture 10: TI MSP430 Timers and Capture Modes

  2. Timer_A Overview • Timer Block • The core, based on 16-bit register TAR • Can chose sources for clock and freq division • Timer block has no output • Flag TAIFG is raised when counter returns to 0 • Capture/compare channels • Capture an input, record value in TAR triggered by TACCRn • Compare TAR with the value stored in TACCRn • Request an Interrupt by setting its flag TACCRn CCFIG • Sample an input at a compare event

  3. ECE 447: MSP430 Timer_A System Generating delays - imposing a specific delay between two points in the program by polling. label 1 instr1 instr2 delay instrN label2

  4. ECE 447: MSP430 Timer_A System 2. Input capture - measuring the time between signal edges start stop stop start 3. Output compare - generating signals with the given timing characteristics single pulse periodical signal pulse width period

  5. ECE 447: MSP430 Timer_A System 4. Real Time Clock– Produce a periodic signal for the MSP430. period The Real Time Clock Interrupt implements a hardware based time of day clock that can be used by the software.

  6. ECE447: MSP430 Timer I/O Pins and Channels - 4618

  7. ECE447: MSP430 Compare/Capture Block Diagram.

  8. MSP430xx4xx Implementation of Timer_A

  9. Timer_A Interrupt Schematic

  10. Timer_A MSP430xx4xx Registers

  11. TACTL: Timer_A Control Register

  12. TAR: Timer_A Register

  13. TACCRx: Timer_A Capture/Compare Register

  14. TACCTLx: Capture/Compare Control Register

  15. TAIV: Timer_A Interrupt Vector Register

  16. ECE447: MPS430 Timer_A input clocks and dividers

  17. ECE447: Measuring Pulse Widths 100 s < width < Configured Period (previous table) stop start width  100 s stop start width  Configured Period (previous table) stop start Timer overflows

  18. ECE 447: Measuring intervals <216 clock cycles FFFF stop start 0

  19. ECE 447: Measuring intervals <216 clock cycles (overflow) 1 2 FFFF start stop 0

  20. ECE 447: Measuring intervals >216 clock cycles 1 2 N=3 FFFF stop R start 0

  21. ECE 447: Measuring intervals >216 clock cycles 3 N=4 1 2 FFFF R1 start R1+R2=R stop 0 R2

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