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Embedded Systems and Software

Embedded Systems and Software. Ed F. Deprettere, Todor Stefanov, Hristo Nikolov {edd, stefanov, nikolov}@liacs.nl Leiden Embedded Research Center Spring 2008; Friday 1:30 p.m. – 4:00 p.m. http://www.liacs.nl/~cserc/EMBSYST/EMBSYST2008/. The Course. Introduction to course (today)

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Embedded Systems and Software

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  1. Embedded Systems and Software Ed F. Deprettere, Todor Stefanov, Hristo Nikolov {edd, stefanov, nikolov}@liacs.nl Leiden Embedded Research Center Spring 2008; Friday 1:30 p.m. – 4:00 p.m. http://www.liacs.nl/~cserc/EMBSYST/EMBSYST2008/ 01EMBSYST2008 Ed F.Deprettere

  2. The Course • Introduction to course (today) • Models of Computation (MoC), • - dataflow graphs, dataflow process networks, analysis, • - scheduling, memory management, • Kahn Process Networks (also introduction to hands-on), • - Another MoC, • - Conversion of sequential imperative nested-loop • programs to input-output equivalent process networks, • Mapping of process networks to multi-core architectures, • - Workload modeling, performance analysis, exploration, • - Homogeneous and heterogeneous target platforms, 01EMBSYST2008 Ed F.Deprettere

  3. Introduction to course • Systems and Embedded Systems, • History of Embedded Systems and Software, • Examples, • Complexity issue, • Trends and challenges, • Design space exploration, • Programming and translating, • Conclusions. 01EMBSYST2008 Ed F.Deprettere

  4. Examination No formal written exam Final grade (10) consists of average of three sub-grades 1. active course participation (10) 2. power-point presentation (10) 3. hands-on (10) 01EMBSYST2008 Ed F.Deprettere

  5. The books 1. Computers as Component, Principles of Embedded Computer Systems Design. Wayne Wolf . (Morgan Kaufman Publishers) http://www.ee.edu/~wolf/embedded-book/about.html 2. Embedded System Design. Peter Marwedel. (Kluwer) http://ls12-www.cs.uni-dortmund.de/~marwedel/kluwer-es-book 3. Embedded System Design, A Unified Hardware/Software Introduction. Frank Vahid/Tony Givargis (Wiley) http://www.ics.uci.edu/~sumitg/CadPages.html 4. Fundamentals of Embedded Software. Daniel W. Lewis (Prentice Hall) http://www.prenhall.com/divisions/esm/app/lewis/materials.html 5. Embedded Multiprocessors: Scheduling and Synchronization. Sundararjan Sriram and Shuvra S. Bhattacharyya (Marcel Dekker) 01EMBSYST2008 Ed F.Deprettere

  6. Systems A system is a composition of functionalities that jointly implement an input-output behavior in a dependable and secure manner. Dependable system: can deliver services that are justifiable trusted (have accepted dependences) • Secure: composite of attributes of • confidentiality (degree of confidence) • integrity (absence of improper system alteration) • availability (readiness for correct service) Secure system behaves as intended. 01EMBSYST2008 Ed F.Deprettere

  7. Embedded Systems • An Embedded System is aninformation processing system that is: • application domain specific (not general purpose) • tightly coupled to its environment Examples of application domains are: automotive, multimedia. Environment: type and properties of input/output information. Tightly coupled: environment dictates what the system’s response behavior must be. Current Embedded Systems are becoming multi-core multi-platform (sub-)systems, executing multiple independent applications, mostly in real time, and at low power consumption. 01EMBSYST2008 Ed F.Deprettere

  8. Embedded Systems (2) Do Embedded Systems belong to the field of Computer Science, or to the field of Computer or even Electrical Engineering? An embedded system performs computation that is subject to physical constraints: interaction with a physical environment, and execution on a physical (implementation) platform. • interaction: deadlines, throughput, jitter • execution: available resources, power, failure rates Embedded systems design is not a straightforward extension of either hardware (computer/electrical engineering) or software (computer science) design. They have functional requirements (expected services), and they have extra-functional requirements (performance/cost, robustness). 01EMBSYST2008 Ed F.Deprettere

  9. Embedded Systems (3) Specific: Computer Scienceprovides (software) functionality for Instruction Set Architectures (ISA) which are characterized by an instruction set and an organization (program counter, register file), independent of any logical implementation and physical realization. Computer/Electrical Engineering deals with logical implementation and physical realization. An Embedded Systems design disciplineneeds to combine these two approaches, because extra-functional behavior (such as timing) is a crucial issue, especially when there are real-time constraints imposed by the environment, and when to predict extra-functional behavior using abstract models that cannot be well specified if the relation between functional behavior and extra-functional behavior is obscure. 01EMBSYST2008 Ed F.Deprettere

  10. inputs outputs PLA current state next state registers History In the past, embedded systems were called (embedded) controllers (micro-controllers). They appear typically in control dominated applications. Examples: traffic lights, elevators, washers, dryers, vendor machines ATM machines These are relatively simple finite state machines implemented using either micro-controllers or sequential circuits (programmable logic arrays – PLA) 01EMBSYST2008 Ed F.Deprettere

  11. Some small examples Product: Hunter Programmable Digital Thermostat. Microprocessor: 4-bit 01EMBSYST2008 Ed F.Deprettere

  12. Product: Miele dishwashers.Microprocessor: 8-bit Motorola 68HC05. 01EMBSYST2008 Ed F.Deprettere

  13. Product: NASA's Mars Sojourner Rover.Microprocessor: 8-bit Intel 80C85. 01EMBSYST2008 Ed F.Deprettere

  14. Product: Sony Aibo ERS-110 Robotic Dog.Microprocessor: 64-bit MIPS RISC. What they have in common: They sense the environment (input signals), decide on (compute) their actions (responses) in real time. 01EMBSYST2008 Ed F.Deprettere

  15. History (cont’d) With growing complexity of applications some processing of signals was added to pure finite state machine behavior : FSMs became EFSMs (extended finite state machines). With still more growing complexity concurrency and parallelism become important. E.g., communicating (E)FSMs. Here is what is happening. 01EMBSYST2008 Ed F.Deprettere

  16. Embedding systems – hence embedded systems – may be (extremely) complex. Systems can be (extremely) complex: Expected • wafer stepper • imaging (medical, radar, telescope) • digital copiers/printers On-chip transistor density • wafer steppers • imaging (medical, biology, astronomy) application complexity/performance Shared memory architecture Actual time Complexity Issue 01EMBSYST2008 Ed F.Deprettere

  17. Embedding systems – hence embedded systems – may be (extremely) complex. Expected • wafer stepper • imaging (medical, radar, telescope) • digital copiers/printers On-chip transistor density (Moore’s Law) application complexity/performance Shared memory architecture Actual time Complexity Issue (cont’d) Application complexity (Shannon Law) 01EMBSYST2008 Ed F.Deprettere

  18. μP will do for small systems For many consumer products, a single μProcessor will do. For other systems – such as a car – a network of μProcessors is needed. For even larger systems – heterogeneous multi-processor Embedded Systems are needed 01EMBSYST2008 Ed F.Deprettere

  19. Programmable core + SW TM MIPS Mem CP1 CP2 Dedicated coprocessor Heterogeneous Architectures Heterogeneous architectures consist of programmable and dedicated components 01EMBSYST2008 Ed F.Deprettere

  20. P FPGA Mem Mem Mem Mem ... Communication Structure P P PE PE PE PE ... P P Identical tiles (scalable) Trend in Multi-processor • current state of art: co-processor • next: multi-processor • then: heterogeneous multi-processor • later: networks on chips 01EMBSYST2008 Ed F.Deprettere

  21. Small Systems: CoMPSoC • A relatively small Embedded System is • a multi-processor(MP)service providing resource • infrastructure organized as a system-on-chip(SoC), • in which processors are heterogeneous (programmable, • configurable, dedicated) • having a communication, synchronization, and storage • infrastructure that is built on top of a Network-on-Chip(NoC) • being capable of executing a composition(Co) of multiple • (independent) applications simultaneously. Processors run autonomously and concurrently, and are not abundant as in (homogeneous) cluster or grid computers. 01EMBSYST2008 Ed F.Deprettere

  22. station density high in core text Central core (2km) Remote central core contains supercomputer stationation 350 km A less simple Embedded System • LOFAR • SKA • station contains • 100 LF antennas • 100 HF compound antennas Distributed hierarchical radio telescopes 01EMBSYST2008 Ed F.Deprettere

  23. Embedded Systems (5) In this course we envision an embedded system (model) to be the triple < application (model), architecture (model), association of the two together> The application (model) is a pure functional model: it has no timing properties. The architecture (model) is a pure extra-functional model: it has no functional behavior. The association together (mapping) relates application (model) and architecture (model). 01EMBSYST2008 Ed F.Deprettere

  24. D A C data-stream data-stream B communication channel D process while(1){ read (A); read (B); execute(); write (C); } service functionality Application Model Application: processes and inter-process communication channels co-ordination (synchronization) is well defined 01EMBSYST2008 Ed F.Deprettere

  25. Architecture Model Architecture : composition of (library) components private memory buffers processor types network service timing, cost shared memory 01EMBSYST2008 Ed F.Deprettere

  26. Mapping D A C B {D, A} Mapping: relation 01EMBSYST2008 Ed F.Deprettere

  27. Application Architecture Mapping (Semi-) Automated Design Space Exploration Analysis Design Space Exploration 01EMBSYST2008 Ed F.Deprettere

  28. Challenges Given that an embedded system architecture consists of a number of heterogeneous computational units (programmable, configurable, and dedicated), and a communication, synchronization and storage infrastructure: • How to map sequential C or C++ programs to such parallel • architectures? • How to map several applications simultaneously to such • architectures, guaranteeing a prescribed quality of service • for each application. Neither of the two is trivial. 01EMBSYST2008 Ed F.Deprettere

  29. FPGA S1 S2 Process-to-FPGA CoMPSoC parallel specification Matlab/C/C++/Java for j = 1:1:N, [x(j)] = S1( ); end for i = 1:1:K, [y(i)] = S2( ); end for j = 1:1:N, for i = 1:1:K, [y(i), x(j)] = func(y(i), x(j) ); end end for i = 1:1:K, [Out(i)] = Sink( y( I ) ); end F1 F2 conversion Sink F3 F4 mapping Parameterized Nested Loop Programs 01EMBSYST2008 Ed F.Deprettere

  30. Why FPGA ? A Field Programmable Gate Array(FPGA) is a billion transistor hardware programmable, i.e.,(re-)configurable, single-chip fabric consisting of a huge amount of look-up tables,memory cells, and mesh interconnect channels. Current FPGAs include high-level functional blocks, even ISA components. An FPGA CoMPSoC is (much) more flexible, and (much) cheaper than a custom designed CoMPSoC. An FPGA CoMPSoC comprising many software and hardware processing components in a run-time re-configurable network is feasible. Limitations are only coming from restricted on-chip memory resources. 01EMBSYST2008 Ed F.Deprettere

  31. sequential process parallel specification Component Applications platform / / Mem Mem Mem Mem ... platform Communication Structure FPGA PE PE PE PE ... – Part II: applying it allThe Big Picture Sequential program → 01EMBSYST2008 Ed F.Deprettere again CoMPSoC

  32. The Bigger Picture Application Explore, modify, select instances Library of IP cores Library of IP cores Compaan (LERC) High-level Models SESAME (UvA) Mapping Spec in XML Mapping Specification Kahn Process Network in XML Platform Spec in XML Common XML Interface RTL-level Models ESPAM (LERC) Multiprocessor System on Chip – Synthesizable VHDL and C/C++ code for processors Design of Flexible Interconnection (FLUX) Network Components (TUD) 01EMBSYST2008 Ed F.Deprettere

  33. System-Level Specification Mapping Spec in XML KPN In XML Platform Spec in XML Library of IP cores ESPAM Auxiliary files IP cores in VHDL Platform topology description C/C++ code for processors RTL-Level Specification Xilinx Platform Studio (XPS) Tool Program code Processor 2 Program code Processor 1 VirtexII-Pro FPGA Gate-Level Specification Program code Processor 3 The ESPAM Design Flow 01EMBSYST2008 Ed F.Deprettere

  34. Other platforms FPGAs are currently powerful enough to prototype CoMPSoC embedded systems, or even to serve as actual product platforms that are application domain specific. System implementation in FPGAs can be done without programmers having to deal with it. However, other – given platforms – can be target platforms as well. Examples are Intel multi-core platforms, the IBM Cell processor platform, and GPU platforms. Lerc’s approach is independent of specific target platforms, but can deal with various platforms. 01EMBSYST2008 Ed F.Deprettere

  35. Example:Motion JPEG encoder Sequence of T frames dimV Video stream M-JPEG encoded (4:2:2 YUV format) video stream JPEG encoding 01EMBSYST2008 Ed F.Deprettere dimH

  36. M-JPEG Specification (Matlab) Parameterized [ QTables, HuffTables, TablesInfo ] = P1_l_DefaultTables( ); for k = 1:1:NumFrames, [ HeaderInfo ] = P1_l_VideoInInit( ); for j = 1:1:VNumBlocks, for i = 1:1:HNumBlocks, [ Block( j ,i ) ] = P1_l_VideoInMain( ); end end for j = 1:1:VNumBlocks, for i = 1:1:HNumBlocks, [ Block( j , i ) ] =DCT( Block( j , i ) ); end end for j = 1:1:VNumBlocks, for i = 1:1:HNumBlocks, [ Block( j , i ) ] = Q( Block( j , i ), QTables ); [ Packets ] = VLE( Block( j , i ), HuffTables ); [ ] =P1_l_VideoOut( HeaderInfo, TablesInfo, Packets ); end end end %parameter NumFrames 1 1000; %parameter VNumBlocks 16 256; %parameter HNumBlocks 8 256; Block( j , i ) 01EMBSYST2008 Ed F.Deprettere

  37. Application In Matlab Block Block Q VLE DCT Compaan Compiler HuffTables QTables Packets Block struct Block { P1 int Y1[64]; /* block 8x8 pixels */ int Y2[64]; /* block 8x8 pixels */ int U[64]; /* block 8x8 pixels */ int V[64]; /* block 8x8 pixels */ }; Deriving the M-JPEG Model 01EMBSYST2008 Ed F.Deprettere

  38. Block Block Q VLE DCT HuffTables QTables Block Block Packets Block Q VLE DCT P1 HuffTables QTables Packets Block P1 PPC1 B1 FIFO0 FIFO0 PPC1 B1 FIFO1 FIFO2 VB1 VB3 PPC2 B2 FIFO0 FIFO0 PPC2 B2 VB4 VB2 Mapping 01EMBSYST2008 Ed F.Deprettere

  39. app arch abstraction pyramid low high idea (requirements) map back of the envelope Performance numbers abstract approximate models Abstraction and opportunities Accuracy and cost cycle-accurate models synthesizable models design space high low Conclusion Embedded system architectures and the applications mapped on them are so complex, that modeling them needs to be done at abstract levels and separately. 01EMBSYST2008 Ed F.Deprettere

  40. If arguments a and b are available in input FIFO buffers A and B, and room for c is available in FIFO buffer C, then f() can fire (execute). f() is a mathematical function. Actor: A C B [c] = f(a,b) Process: A for i= 1 :1 : N, [a] = Read(A); [x] = f(a); [b] = Read(B); [c] = g(x, b); Write(c, C); end C B {f, g} Conclusion (2) In this course I will be dealing with abstract models, mainly for streaming applications. These are dataflow models that are graphs or networks of functional actors or processes, respectively, that transform input streams of tokens to output streams of tokens. 01EMBSYST2008 Ed F.Deprettere

  41. t N c b a d p Conclusion (3) An example: while(1){ [N, a] = f1(t); for i = 1 : 1 : N, [p(i), b(i)] = f2(a(i)); if p(i) = T, [c] = f3(b(i)); end if p(i) = F, [d] = f3(b(i)); end end } t = (N; a={a(i) | i = 1:1:N}), a block of data with header N, a parameter. 01EMBSYST2008 Ed F.Deprettere

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