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Prabhat Mishra, Nikil Dutt, Alex Nicolau Architectures and Compilers for Embedded Systems (ACES) Center for Embedded Computer Systems University of California, Irvine October 03, 2001 Outline Motivation Functional Abstraction Contemporary example architectures Design Space Exploration

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slide1

Prabhat Mishra, Nikil Dutt, Alex Nicolau

Architectures and Compilers for Embedded Systems (ACES)

Center for Embedded Computer Systems

University of California, Irvine

October 03, 2001

outline
Outline
  • Motivation
  • Functional Abstraction
  • Contemporary example architectures
  • Design Space Exploration
  • Summary

Functional Abstraction driven Design Space Exploration of Heterogeneous Programmable Architectures

motivation
Motivation
  • Contemporary architectures vary widely
    • RISC, DSP, VLIW, Superscalar
    • Toolkit is available for certain class of architectures
  • Emerging architectures have combined features
    • TI C6x (DSP + VLIW), Itanium (VLIW + Superscalar)
  • Design space exploration is important
    • a way of specifying wide varieties of features
    • automatic software toolkit generation
  • Allows designers to make fast design decisions by reusing the abstraction primitives

Functional Abstraction driven Design Space Exploration of Heterogeneous Programmable Architectures

is abstraction possible
Is Abstraction Possible ?
  • Similarities
    • Functional units, connected using ports, connections, and pipeline latches
    • Memory consists of SRAM, DRAM, caches ..
  • Differences
    • Same unit with different parameters
    • Same functionality in different unit
    • New architectural features
  • Defined generic functions, sub-functions and computational framework

Functional Abstraction driven Design Space Exploration of Heterogeneous Programmable Architectures

the flow
The Flow

Specification

Architecture Specification

(EXPRESSION ADL)

Feedback

Functional Abstraction

Generic

Simulation

Models

Compiler

Simulator

Obj

Application

Design Space Exploration

Functional Abstraction driven Design Space Exploration of Heterogeneous Programmable Architectures

functional abstraction
Functional Abstraction
  • Structure of a generic processor
  • Behavior of a generic processor
  • Generic memory subsystem
  • Generic controller
  • Interrupts and exceptions
  • Generic DMA, co-processor etc.

Functional Abstraction driven Design Space Exploration of Heterogeneous Programmable Architectures

generic fetch unit
Generic Fetch Unit

FetchUnit ( # read per cycle n, res_Station size, ........ )

{

address = ReadPC()

Instructions = ReadInstMemory(address, n)

WriteToReservationStation(Instructions, n)

outInst = ReadFromreservationStation(m)

WriteLatch(decode_latch, outInst)

pred = QueryPredictor(address)

If pred

{

nextPC = QueryBTB(address)

SetPC (nextPC)

} else

IncrementPC(x)

}

Functional Abstraction driven Design Space Exploration of Heterogeneous Programmable Architectures

generic controller
Generic Controller

Fetch

BB: 0 SB: 0

Opcode src1 scr2 dest

Decode

BB: 0 SB: 0

FloatIssue

BB: 0 SB: 0

MemIssue

BB: 0 SB: 0

IntIssue

BB: 0 SB: 0

ALU

AddrCalc

BB: 0 SB: 0

FMPY1

BB: 0 SB: 0

FADD1

BB: 0 SB: 0

ALU1

BB: 0 SB: 0

ALU2

BB: 0 SB: 0

TLB

BB: 0 SB: 0

FADD2

BB: 0 SB: 0

SQRT

BB: 0 SB: 0

FDIV

BB: 0 SB: 0

FMPY2

BB: 0 SB: 0

MPY3

BB: 0 SB: 0

FADD3

BB: 0 SB: 0

Distributed Control

Control Table for MIPS R10K Processor

Functional Abstraction driven Design Space Exploration of Heterogeneous Programmable Architectures

contemporary example architectures
Contemporary Example Architectures
  • MIPS R10K Architecture
    • Dynamic, superscalar microprocessor implements 64-bit MIPS-4 instruction set
    • Fetch/execute speculatively beyond branches
    • out-of-order execution, in-order completion
  • TI C6x Architecture
    • Hybrid 8-way VLIW DSP
    • Novel memory subsystem: cache hierarchy, configurable SRAM, partitioned register file
  • Captured and generated toolkit for DLX, TI C6x, MIPS R10K, and PowerPC architectures

Functional Abstraction driven Design Space Exploration of Heterogeneous Programmable Architectures

design space exploration
Design Space Exploration
  • Exploration varying processor features
    • MIPS R10K with in-order completion
    • 27% perf. improvement using out-of-order completion for multimedia & DSP benchmarks
    • The complete experiment took one week
  • Co-processor based exploration
    • TI C6x, functional unit is used for vector multiply
    • 22% performance improvement using coprocessor for DSPStone benchmarks
    • The complete experiment took one week
  • Memory subsystem exploration

Functional Abstraction driven Design Space Exploration of Heterogeneous Programmable Architectures

design space exploration11
Design Space Exploration

Co-processor based Exploration using TI C6x

Functional Abstraction driven Design Space Exploration of Heterogeneous Programmable Architectures

design space exploration12
Design Space Exploration

Exploration varying MIPS R10K processor features

Functional Abstraction driven Design Space Exploration of Heterogeneous Programmable Architectures

summary
Summary
  • Design Space Exploration (DSE) of heterogeneous architectures is necessary
  • Functional abstraction based DSE
    • Defined necessary functional abstractions
    • Captures wide varieties of architectures
    • Reduction of exploration time by an order of magnitude
  • Ongoing work
    • Generating synthesized hardware
    • Automatic property checking during DSE

Functional Abstraction driven Design Space Exploration of Heterogeneous Programmable Architectures

slide14
Thank you!

Functional Abstraction driven Design Space Exploration of Heterogeneous Programmable Architectures