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## Filter design from Σ - Δ ADC to incremental Σ - Δ ADC

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**Filter designfrom Σ-Δ ADC to incremental Σ-Δ ADC**Donglijun 2013-4-28 TJU ASIC center**index**filter design of Σ-Δ ADC filter design of incremental Σ-Δ ADC difference between the two filters**filter design of Σ-Δ ADC**• Σ-Δ ADCs are widely used in telecommunication and multimedia applications. • The key property of Σ-Δ ADC • ①to achieve high resolution do not rely on precisely matched analog elements • ②rely on oversampling, noise-shaping and digital post-filtering. • ③can be integrated well into today’s fine line-width CMOS technologies.**filter design of Σ-Δ ADC**• Modulators of Σ-Δ ADC push the noise from low frequency rate to high frequency rate. So to achieve high resolution, the key point of Σ-Δ ADC is its digit filter’s suppression of high frequency. • The function of the filter are as follow: • ①filtering • ②decimating • ③coding • There is some parameters • for Σ-Δ ADC filter: • ①decimating rate(D) • ②bandwidth • ③SNR**Filter architecture**CIC filter FIR filter(half band filter)**Introduction to incremental Σ-Δ ADC**• Unfortunately, these classical ΣΔ structures are not well suited for instrumentation and measurement (DC) applications. • Require: • ①very high absolute accuracy and linearity • ②high dynamic range and signal-to-noise ratio • ③Hertz wide bandwidth(nearly DC input)**Filter design for IDC**3 Typical structure of decimation filter • CoI filter • Sinc filter(CIC) • Optimal filter Line frequency noise • S/H and the error of S/H • Periodic noise suppression digit filter Canceling periodic noise**Typical structure for IDC filter**• Sinc filter(CIC) • Cascade Integrate Comb • CoI filter • Cascade Of Integrated**rotated sinc filter**• From left to right D=32,64,128 bottom D=128**Design deference between Σ-Δ filter and incremental Σ-Δ**filter**Reference**• [1]Aziz, P.M.; Sorensen, H.V.; vn der Spiegel, J., "An overview of sigma-delta converters," Signal Processing Magazine, IEEE , vol.13, no.1, pp.61,84, Jan 1996 • [2]M Gustavsson, N Tan ."High performance switched-capacitor filter for oversampling Sigma-Delta digital to analog converters" US Patent 6,614,374, 2003 • [3]CH Dick, FJ Harris "Narrow-band filter including sigma-delta modulator implemented in a programmable logic device"US Patent 6,600,788, 2003 • [4]H Murakami, T Kawai"Inertial force sensor including a sense element, a drive circuit, a sigma-delta modulator and a signal processing circuit"US Patent 7,891,245, 2011 • [5]de la Rosa, J.M., "Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey," Circuits and Systems I: Regular Papers, IEEE Transactions on , vol.58, no.1, pp.1,21, Jan. 2011 • [6]Gadde, Venkata Veera Satya Sair.,"Filter Design Considerations for High Performance Continuous-Time Low-Pass Sigma-Delta ADC." 2012.3.12 Texas A&M University academic thesis • [7]JL Gorecki, T Liu.,"Phase noise shaping using sigma delta modulation in a timing recovery unit"US Patent 7,720,160, 2010 • [8]Lo Presti, L., "Efficient modified-sinc filters for sigma-delta A/D converters," Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on , vol.47, no.11, pp.1204,1213, Nov 2000 • [9]Agah A, Vleugels K, Griffin P B, et al. A High-Resolution Low-Power Incremental 61 ADC With Extended Range for Biosensor Arrays[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2010, 45(6): 1099. • [10]Guo G, Wu D, Shen Y, et al. An optimal filter with optional resolution used in incremental ADC for sensor application[C]//Consumer Electronics, Communications and Networks (CECNet), 2011 International Conference on. IEEE, 2011: 1042-1045.**Reference**• [11]Kook S, Gomes A, Jin L, et al. Optimal Linearity Testing of Sigma-Delta Based Incremental ADCs Using Restricted Code Measurements[C]//Mixed-Signals, Sensors and Systems Test Workshop (IMS3TW), 2011 IEEE 17th International. IEEE, 2011: 72-77. • [12]Maréchal S, Krummenacher F, Kayal M. Optimal filtering of incremental first-order sigma-delta modulators with sweep input[C]//Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on. IEEE, 2010: 539-542. • [13]Maréchal S, Krummenacher F, Kayal M. Optimal filtering of an incremental second-order MASH11 sigma-delta modulator[C]//Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on. IEEE, 2011: 240-243. • [14]Srinivas T, Madhuri V, Kumar D V J R, et al. Capacitor rotation method for removing gain error in sigma-delta analog-to-digital converters: U.S. Patent 7,825,838[P]. 2010-11-2. • [15]Garcia J, Rusu A. An extended-range incremental CT∑ Δ ADC with optimized digital filter[C]//Quality Electronic Design (ISQED), 2012 13th International Symposium on. IEEE, 2012: 179-184. • [16]Caldwell T C, Johns D A. Incremental data converters at low oversampling ratios[J]. Circuits and Systems I: Regular Papers, IEEE Transactions on, 2010, 57(7): 1525-1537. • [17]Yu W, Aslan M, Temes G C. 82 dB SNDR 20-channel incremental ADC with optimal decimation filter and digital correction[C]//Custom Integrated Circuits Conference (CICC), 2010 IEEE. IEEE, 2010: 1-4. • [18]Tsang R M, Tucker J C, Melanson J L. Discrete-time delta-sigma modulator with improved anti-aliasing at lower quantization rates: U.S. Patent 8,130,127[P]. 2012-3-6. • [19]Garcia, J.; Rodriguez, S.; Rusu, A., "On Continuous-Time Incremental \Sigma \Delta ADCs With Extended Range," Instrumentation and Measurement, IEEE Transactions on , vol.62, no.1, pp.60,70, Jan. 2012