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Analog Senior Projects 2019

Explore "pure analog" projects as well as projects at the interface between analog and digital in Cryogenic Analog Circuits for Infrared Imagers, Voltage Level Detector for Near Vth Computing, Random Number Generator for Data Encryption, Analog Neural Network for Deep Learning, Compact Analog to Digital Converter using SAR Algorithm, and Low Drop-Out (LDO) Voltage Regulator. These projects can also continue into an MS degree. Contact Joseph Shor at joseph.shor@biu.ac.il for more information.

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Analog Senior Projects 2019

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  1. Analog Senior Projects 2019 EnICS Labs, NanoElectronicsTrack - Analog

  2. Analog Design as a Field

  3. Prof. Yossie Shor’s Projects • We have “Pure Analog” projects + Projects which are at the interface between Analog and Digital • Cryogenic Analog Circuits for Infrared Imagers • Voltage Level Detector for Near Vth Computing • Random Number Generator for Data Encryption • Analog Neural Network for Deep Learning • Compact Analog to Digital Converter based the SAR Algorithm • Low Drop-Out (LDO) Voltage Regulator Most of these projects can continue into an MS degree!! Joseph.shor@biu.ac.il

  4. Cryogenic Analog Circuits for Infrared Imagers • IR imagers can detect thermal radiation from the Human body. These imagers are useful for security, autonomous vehicles and many other applications. • The dark currents need to be minimized, so the imagers are cooled to temperatures as low as 77K. • Semiconductors behave very differently at these temperatures due to carrier freeze out. • We need several types of circuits, including Sense Amplifiers, Reference Voltage generators and thermal sensors so there can be several projects here.

  5. Voltage Level Detector for IOT near V-threshold computing • At low voltages, close to Vth, Energy Efficiency in computers is optimized, which make near-Vth operation attractive for the Internet of Things. • These systems require a detector which indicates that the Supply voltage is present and the computation can proceed. • The challenge in this project is to develop an accurate detector which can work very close to Vth.

  6. Voltage Level Detector (cont) • A reference voltage, Vref, is compared to a divided Vcc, Vcc/N to see if Vcc has exceeded the required threshold. • Vrefneeds to be ready before Vcc/N which is the challenge of this project. • The circuit needs to function at very low voltage (0.5V) as well as low current levels (500nA). Vref Vcc/N

  7. Random Number Generator for Data Encryption • The use of random numbers underlies most of the cryptographic algorithms used in modern communications. • A random number is the best known method to generate an unpredictable cryptographic key. • True Random Number Generators (TRNGs) are electrical circuits integrated within the system that generate sequences of random bits. To extract these bits, random noise processes are amplified into logic levels of “1” and “0”.

  8. True Random Number Generator (cont) • The TRNG operates by amplifying the noise during the wakeup of a CMOS latch. • The Latch wakes up in either a 0 or 1 state based on this noise. • Variable capacitors are used to eliminate mismatch. • Temperature and Vdd level also needs to be tracked by a clever algorithm. • This is basically a digital circuit, but analog-type techniques are used to optimize it. Hb H s1 s2 EN Tilt_Hb Tilt_H

  9. Analog Neural Networks for Deep Learning • Machine learning is everywhere and is based on neural networks. • Convolutional Neural Networks (CNN) are generally implemented using digital circuits but the MAC operations consume huge amounts of energy. • There is a substantial opportunity to save energy by building the neurons and summing them using analog circuits which accumulate charge, thus reducing the power by several orders of magnitude. • The Network will be designed a simulated using MATLAB and SPICE tools. • This project will require development of analog, algorithmic and digital design skills.

  10. Analog Neural Networks (cont) Neuron • The neuron is composed of analog synapses which generate charge to be summed on an output capacitor. • This is the input to the next neuron in the network. • Need to calculate the cost function and apply the back-propagation algorithm, as in any machine learning.

  11. Compact Analog to Digital Converter (ADC) Using the SAR Algorithm • Analog to digital converters are used to transfer real-world information, which is analog, to the digital domain for further signal processing. • In this project you will design a highly compact analog to digital converter (ADC) using the SAR (Successive Approximation Register). • The SAR topology is one of the most attractive for low power and compact ADC applications. • The SAR ADC includes both analog and digital blocks, which will allow you to develop skills in both. There is also an algorithmic aspect to this as well.

  12. Basic SAR – Successive Approximation Register Basic idea is to do a binary search Move the reference voltage around until you get to the LSB Chapter 17 Figure 05

  13. Low Drop-Out (LDO) Voltage Regulator • As Integrated Circuits scale down to lower and lower voltages, it is very important to save power and optimize the power/performance. • In order to do this, different areas of the chip are placed at varying voltages based on the required activity levels. • As such there has been an increasing trend to have on-die voltage regulators so that there can be many power domains on chip.

  14. LDO cont. – Power Supply: Expensive Solution • Application Processor (AP) has lots of supply rails coming from the Power Management IC (PMIC). • These rails add cost and complexity at the system level.

  15. LDO enables Cost-effective Power • On die regulators can be relatively compact and reduce the number of supplies. • This saves board space and enables a smaller system.

  16. Registration Process • If you are interested, please email Yossie at joseph.shor@biu.ac.il • We will set up interviews for the relevant students on the week of June 10. • This powerpoint will be posted on the Yossie Shor Faculty website

  17. See you at the interview! • We’ll send out an email to register.

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