ECE2030 Introduction to Computer Engineering Lecture 3: Switches and CMOS

1. ECE2030 Introduction to Computer EngineeringLecture 3: Switches and CMOS Prof. Hsien-Hsin Sean Lee School of Electrical and Computer Engineering Georgia Tech

2. Basic Switch • A path exists when the Switch Control is closed • If (Open) OUTPUT = unknown ; Switch is open (OFF) • Else OUTPUT = INPUT ; Switch is closed (ON) Switch Control OUTPUT INPUT

3. Switch Control (Gate) OUTPUT INPUT The Analogy of A Transistor Cross Section An N-Channel Metal-Oxide Semiconductor Field Effect Transistor (MOSFET)

4. Drain Gate Source Transistor Characteristics • Cut-off Region • Vgs – Vt  0 • No current (Ids) between drain and source • Linear (or Ohmic) Region • 0 < Vds < Vgs – Vt • Ids is a function of Vgs and Vds • Ids = β*[(Vgs-Vt)*Vds – Vds*Vds/2] • Saturation Region • 0 < Vgs – Vt < Vds • Ids is independent of Vds • Ids = (β/2)*(Vgs-Vt)2 • β = process factor * (W/L) • Vt : Threshold voltage, a function of materials, doping, insulator thickness, etc. Vds Ids Vgs N-type MOS Transistor

5. Transistor Characteristics

6. Switches in Series INPUT Truth Table S1 S2 OUTPUT

7. Switches in Series INPUT Truth Table (OFF/ON=0/1) S1 S2 OUTPUT What Function ??

8. Switches in Series INPUT Truth Table (OFF/ON=0/1) S1 S2 OUTPUT Function = ??

9. Switches in Series INPUT Truth Table (OFF/ON=0/1) S1 S2 OUTPUT Function = ??

10. Switches in Series INPUT Truth Table (OFF/ON=0/1) S1 S2 OUTPUT Function = ??

11. Switches in Series INPUT Truth Table (OFF/ON=0/1) S1 S2 OUTPUT Function = Logic AND

12. Switches in Parallel INPUT Truth Table S1 S2 OUTPUT

13. Switches in Parallel INPUT Truth Table S1 S2 OUTPUT Function =??

14. Switches in Parallel INPUT Truth Table S1 S2 OUTPUT Function =??

15. Switches in Parallel INPUT Truth Table S1 S2 OUTPUT Function =??

16. Switches in Parallel INPUT Truth Table S1 S2 OUTPUT Function = Logic OR

17. Drain Gate Source Source Gate Drain CMOS Transistor • Complementary MOS • P-channel MOS (pMOS) • N-channel MOS (nMOS) • pMOS • P-type source and drain diffusions • N substrate • Mobility by holes • nMOS • N-type source and drain diffusions • P substrate • Mobility by electrons pMOS nMOS

18. Gate=Vdd Vgs Vin=0 Vout=Vdd I Load Capacitor Ground Pass Transistor using NMOS • Assume capacitor (CL) is initially discharged • Gate=1, Vin=1 • CL begins to conduct and charges toward 1 (Vdd) and stops at (Vdd-Vt) • Signal is degraded Gate=Vdd Vgs Vin=Vdd Vout I Load Capacitor Ground • Gate=1, Vin=0 • CL begins to discharge toward 0

19. Transmission Degradation using Pass Transistor Vdd (1) Vdd - Vt Vdd Vdd - 2Vt Vdd Vdd Vdd Vout = Vdd- N*Vt Still 1??

20. Transmits 1 well • Transmits 0 poorly Drain Gate Source Source Gate • Transmits 0 well • Transmits 1 poorly Drain CMOS Signal Transfer Property pMOS nMOS

21. CMOS Transmission Gate • Transmit signal from INPUT to OUTPUT when Gate is closed Gate (complementary of Gate) Source Drain OUTPUT INPUT Z : High-Impedance State, consider the terminal is “floating” Gate

22. High Impedance • When a path exists • Impedance is low to allow ample flow of current • When no path • Impedance is high allowing almost no current flow between two terminals Gate=1 << 10K Drain Source Closed Gate=0 >> 100M Drain Source Open

23. Transmit Logic 1 Gate = 0 1 1 Gate = 1 Transmission Gates Transmit Logic 0 Gate = 0 0 0 Gate = 1

24. Transmission Gate Symbol Gate Gate OUTPUT INPUT  OUTPUT INPUT Gate Gate