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Advanced EEG Recorder and System Design for BCI Applications

Explore the design and results of a 4-channel EEG recorder with low noise amplification, digitized output, high resistance pathway, and fully differential OpAmp pathway. Future directions include integration with telemetry systems and a Fully Implantable Electro-Electrochemical Probe (FIEEP).

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Advanced EEG Recorder and System Design for BCI Applications

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  1. MEEPS Mohsen Mollazadeh Mixed Signal VLSI Systems Prof. Cauwenberghs

  2. EEG Recording • Why? Slow waves (application : BCI) Broca’s Area(audiotory Cortex) Eplilepsy

  3. System Design • 4 Channel EEG Recorder • Low Noise Amplifier • Digitized output (NRZ and Miller) • Fully Differential Pathway

  4. OpAmp

  5. OpAmp

  6. High Resistance Generation

  7. OP Amp Results

  8. OpAmp Results Corner Frequency : 100 Hz Thermal Noise level: 25 nV/sqrt(Hz)

  9. OpAmop Results • Gain : 40 db • Power Consumption : 60 uW • Input Referred Noise : 4.5 uVrms • Bandwidth: .8 – 10 KHz • Resistance Achieved: >5Tohms

  10. OpAmp Layout

  11. Delta Sigma AtoD

  12. Delta Sigma results

  13. EEG Channel

  14. Future Directions • Complete this and send the chip!!! • Integration with Telemetry System • FIEEP (A Fully Implantable elctro-Electrochemical Probe)

  15. Acknowledgements • Thanks to: Prof. Cauwenberghs Kartik, Chris, Yunbin, Abdullah and Milutin

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