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Basic Structure of Computer
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Basic Structure of Computer

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  1. Basic Structure of Computer • Introduction of computer system & its sub-modules • Basic organization of computer & block level description of the functional units • Von Neumann model • Introduction to buses & connecting I/O devices to CPU & memory • Asynchronous & synchronous bus, PCI, SCSI

  2. Computer Organization & Architecture

  3. Structural/functional view of a computer

  4. Control mechanism Operating environment (source & destination of data) Data movement apparatus Data processing facility Data storage facility Fig: A Functional View of the Computer

  5. Communication Lines Peripherals • COMPUTER • Storage • Processing Fig: The Computer

  6. COMPUTER COMPUTER Input/ Output Main Memory System interconnection Central Processing unit Fig: The Computer: Top-level Structure

  7. COMPUTER Memory I/O System bus CPU CPU Registers Arithmetic & Logic unit Internal CPU interconnection Control unit Fig: The Central Processing Unit (CPU)

  8. CPU ALU Registers Internal bus Control unit CONTROL UNIT Sequencing logic Control unit Registers & decoders Fig: The Control Unit Control memory

  9. Von Neumann Model

  10. Interconnection Structures

  11. Fig: Computer Modules

  12. The interconnection structure must support the following types of transfers: • Memory to Processor • Processor to Memory • I/O to Processor • Processor to I/O to or from memory

  13. Fig: Bus Interconnection Scheme

  14. Control Bus Used to control the access to & the use of data & address lines Typical control lines include • Memory read/write • I/O read/write • Transfer ACK • Bus request/grant • Interrupt request/ACK • Clock • Reset

  15. Multiple-Bus hierarchies

  16. Fig: High-performance architecture

  17. Elements of Bus design

  18. TypeBus Width Dedicated Address Multiplexed Data Method of ArbitrationData transfer Type Centralized Read Distributed Write Read-modify-write Timing Read-after-write Synchronous Block Asynchronous Elements of Bus Design

  19. Synchronous Timing Diagram

  20. Asynchronous Timing • Occurrence of one event on a bus follows & depends on the occurrence of previous event.

  21. Asynchronous Timing – Read Diagram

  22. Asynchronous Timing – Write Diagram

  23. PCI(Peripheral Component Interconnect)