EECE **** Embedded System Design

1. EECE **** Embedded System Design

2. Embedded System Hardware • Embedded system hardware is frequently used in a loop(„hardware in a loop“): actuators Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

3. Target technologies • Processing units • Power efficiency of target technologies • ASICs • Processors • Energy efficiency • Code size efficiency and code compaction • Run-time efficiency • DSP processors • Multimedia processors • Very long instruction word (VLIW) & EPIC machines • Micro-controllers • Reconfigurable Hardware • Memory Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

4. Why worry about energy and power? Processing units • Need for efficiency (power + energy): „Power is considered as the most important constraint in embedded systems“ Current UMTS phones can hardly be operated for more than an hour, if data is being transmitted. Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

5. Operations/Watt[MOPS/mW] Ambient Intelligence 10 DSP-ASIPs hardwired muxed 1 Processors Reconfigurable Computing µPs 0.1 poor design techniques 0.01 Technology 1.0µ 0.5µ 0.25µ 0.13µ 0.07µ The energy/flexibility conflict- Intrinsic Power Efficiency - Necessary to optimize HW/SW; otherwise the prize for software flexibility cannot be paid! Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

6. Power and energy are related to each other P E t In many cases, faster execution also means less energy, but the opposite may be true if power has to be increased to allow faster execution. Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

7. Low Power vs. Low Energy Consumption • Minimizing the power consumption is important for • the design of the power supply • the design of voltage regulators • the dimensioning of interconnect • short term cooling • Minimizing the energy consumption is important due to • restricted availability of energy (mobile systems) • limited battery capacities (only slowly improving) • very high costs of energy (solar panels, in space) • cooling • high costs • limited space • dependability • long lifetimes, low temperatures Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

8. Application Specific Circuits (ASICS)or Full Custom Circuits • Custom-designed circuits necessary • if ultimate speed or • energy efficiency is the goal and • large numbers can be sold. • Approach suffers from • long design times, • lack of flexibility(changing standards) and • high costs(e.g. Mill. $ mask costs). Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

9. Mask cost for specialized HWbecomes very expensive Trend towards implementation in Software ASIC synthesis not covered in this course. Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

10. Key requirements for processors At the chip level, embedded chips include micro-controllers and microprocessors. Micro-controllers are the true workhorses of the embedded family. They are the original ’embedded chips’ and include those first employed as controllers in elevators and thermostats. • Energy/power-efficiency • Power density continues to get worse • Need to consider CPU & System Power • New ideas can actually reduceenergy consumption Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

11. Key requirement #2: Code-size efficiency • CISC machines: RISC machines designed for run-time-,not for code-size-efficiency • Compression techniques: key idea Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

12. Code-size efficiency • Dictionary approach, two level control store (indirect addressing of instructions) • “Dictionary-based coding schemes cover a wide range of various coders and compressors. • Common feature: use some kind of a dictionary that contains parts of the input sequence which frequently appear. • The encoded sequence in turn contains references to the dictionary elements rather than containing these over and over.” • Cache-based decompression • Main idea: decompression whenever cache-lines are fetched from memory. • Cache lines ↔ variable-sized blocks in memory •  line address tables (LATs) for translation of instruction addresses into memory addresses. Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

13. D P a x x[j-i] a[i] AX AY MY MX Address- registersA0, A1, A2 ..i+1, j-i+1 MF AF +,-,.. * x[j-i]*a[i] +,- Address generation unit (AGU) AR yi-1[j] MR Key requirement #3: Run-time efficiency- Domain-oriented architectures - n-1 Application: y[j] = i=0 x[j-i]*a[i] i: 0i  n-1: yi[j] = yi-1[j] + x[j-i]*a[i] Architecture: Example: Data path ADSP210x Application maps nicely onto architecture MR:=0; A1:=1; A2:=n-2; MX:=x[n-1]; MY:=a[0];for ( j:=1 to n) {MR:=MR+MX*MY; MY:=a[A1]; MX:=x[A2]; A1++; A2--} Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

14. Real-time capability • Timing behavior has to be predictableFeatures that cause problems: • Unpredictable access to shared resources • Caches with difficult to predict replacement strategies • Unified caches (conflicts betw. instructions and data) • Pipelines with difficult to predict stall cycles ("bubbles") • Unpredictable communication times for multiprocessors • Branch prediction, speculative execution • Interrupts that are possible any time • Memory refreshes that are possible any time • Instructions that have data-dependent execution times •  Trying to avoid as many of these as possible. Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

15. Target technologies • Processing units • Power efficiency of target technologies • ASICs • Processors • Energy efficiency • Code size efficiency and code compaction • Run-time efficiency • DSP processors • Multimedia processors • Very long instruction word (VLIW) & EPIC machines • Micro-controllers • Reconfigurable Hardware • Memory Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

16. Multimedia-Instructions/Processors Multimedia instructions exploit that many registers, adders etc are quite wide (32/64 bit), whereas most multimedia data types are narrow (e.g. 8 bit per color, 16 bit per audio sample per channel) • Pentium MMX-architecture: • 64-bit vectors representing 8 byte encoded, 4 word encoded or 2 double word encoded numbers. • wrap around/saturating options. • Multimedia registers consistent with floating-point registers. • Ultra-SPARC Processor visual instruction set (VIS) • Instruction for MPEG motion estimation,includes 8 subtractions, 8 additions and 8 absolute value computations on 8 bit data in a single cycle.Replaces up to 1500 instructions by 32 of such instructions. Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

17. Very long instruction word (VLIW) processors Key idea: detection of possible parallelism to be done by compiler, not by hardware at run-time (inefficient). Examples: Texas Instruments TMS 320C6xx; INTEL IA-64 Itanium; Philips TriMedia-Processor VLIW: parallel operations (instructions) encoded in one long word (instruction packet), each instruction controlling one functional unit. E.g.: ! Large # of delay slots, a problem of VLIW processors Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

18. Reconfigurable Logic • Full custom chips may be too expensive, software too slow. • Combine the speed of HW with the flexibility of SW HW with programmable functions and interconnect. Use of configurable hardware;common form: field programmable gate arrays (FPGAs) Applications: bit-oriented algorithms like • encryption, • fast „object recognition“ (medical and military) • Adapting mobile phones to different standards. • Very popular devices from • XILINX (XILINX Vertex II are very recent devices) • Actel and others Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

19. Memory for processor cores • Cores are connected to local block RAM that can be used as a scratchpad. Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science