1 / 29

Compilers Modern Compiler Design

Compilers Modern Compiler Design. Supplementary Note 1 Code Generation (ASU88: Simplified Introduction). NCYU C. H. Wang. The Target Machine. The target machine is a byte-addressable machine with four bytes to a word and n general purpose registers.

larsend
Download Presentation

Compilers Modern Compiler Design

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. CompilersModern Compiler Design Supplementary Note 1 Code Generation (ASU88: Simplified Introduction) NCYU C. H. Wang

  2. The Target Machine • The target machine is a byte-addressable machine with four bytes to a word and n general purpose registers. • It has two address instruction of the form: • op source, destination

  3. Op-codes • MOV (move source to destination) • ADD (add source to destination) • SUB (subtract source from destination)

  4. Addressing Mode Literal #c constant c 1

  5. Examples • MOV R0, M • Store the contents of register R0 into memory location M. • MOV 4(R0), M • Store the value contents(4+contents(R0)) into memory location M. • MOV *4(R0), M • Store the value contents(contents(4+contrnts(R0))) in to memory location M. • MOV #1, R0 • Load the constant 1 into register R0

  6. Instruction Costs • The cost of an instruction to be one plus the costs associated with the source and destination address modes. • MOV R0, R1 (1) • MOV R0, M (2) • MOV #1, R0 (2) • SUB 4 (R0), *12 (R1) (3) • contents(contents(12+contents(R1)))- contents(4+contents(R0))

  7. Example • a := b + c 1. MOV b, R0 2. MOV b, a ADD c, R0 ADD c, a MOV R0, a (cost=6) (cost=6) 3. R0, R1, R2 contain 4. R1, R2 contain the addresses of a, b and c the values of b and c MOV *R1, *R0 ADD R2, R1 ADD *R2, *R0 MOV R1, a (cost=2)(cost=3)

  8. Basic Blocks and Flow Graphs • A basic block is a sequence of consecutive statements in which control enters at the beginning and leaves at the end without halt or possibility of branching except at the end.

  9. Partition into Basic Blocks • First determine the set of leaders • The first statement is a leader. • Any statement that is the target of a conditional or unconditional goto is a leader. • Any statement that immediately follows a goto or conditional goto statement is a leader. • For each leader, its basic block consists of the leader and all statements up to but not including the next leader or the end of the program.

  10. Example (1/2) • Source code begin prod:=0; i=1; do begin prod :=prod + a[i] * b[i]; i:=i+1 end while i<=20 end

  11. Example (2/2) • Three-address code (the partition) B1 B2

  12. Flow Graphs

  13. A Simple Code Generation (1) • For each three-address statement of the form x:=y op z we perform • Invoke a function getreg to determine the location L where the result of the computation y op z should be stored. • Consult the address descriptor for y to determine y’, the current location y. If the value of y is not already in L, generate the instruction MOV y’ L to place a copy of y in L.

  14. A Simple Code Generation (2) • Generate the instruction OP z’, L where z’ is a current location of z. Update the address descriptor of x to indicate that x is in location L. If L is a register, update its descriptor to indicate that it contains the value of x, and remove x from all other register descriptor. • If the current values of y and/or z have no next uses, are not live on exit from the block, and are in registers, alter the register descriptor to indicate that, after execution of x:=y op z, those registers no longer will contain y and/or z, respectively.

  15. Example • d:=(a-b)+(a-c)+(a-c) • Three-address code • t:=a-b • u:=a-c • v:=t+u • d:=v+u

  16. Code sequence

  17. Generating code for indexed assignments

  18. Generating code for pointer assignments

  19. Conditional Statements • CMP x,y • CJ< z • Jump to z if the condition code is negative or zero • x:=y+z • if x<0 goto z • MOV y, R0 • ADD z, R0 • MOV R0, x • CJ< z

  20. The DAG Representation of Basic Blocks • DAG (Directed Acyclic Graphs) • A DAG for a basic block • Leaves labeled by unique identifiers. • Interior nodes labeled by operator symbols • Interior nodes optionally given a sequence of identifiers. The Interior nodes represent computed values, and the identifiers labeling a node are deemed to have that value.

  21. Example (1/2)

  22. Example (2/2)

  23. Constructing a DAG (1/2) • Suppose the current three-address statement is either (i) x:=y op z, (ii) x:=op y or (iii) x:=y. We treat a relational operator like if i<=20 goto as case (i), with x undefined. • If node(y) is undefined, create a leaf labeled y, and let node(y) be this node. In case (i), if node(z) is undefined, create a leaf labeled z and let that leaf be node(z).

  24. Constructing a DAG (2/2) • In case (i), determine if there is a node labeled op, whose left child is node(y) and whose right child is node(z). If not, create such node. In either event, let n be the node found or created. In case (ii), determine if there is a node labeled op, whose lone child is node(y). If not, create such node, and let n be the node found or created. In case (iii), let n be the node(y). • Delete x from the list of attached identifiers for node(x). Append x to the list of attached identifiers for the node n found in (2) and set node(x) to n.

  25. Example

  26. Generating Code from DAGS

  27. Code sequence

  28. Rearrange the Order of the Statements

  29. Other Topics • Code Optimization • Dynamic Programming Code Generation Algorithm

More Related