200 likes | 222 Views
Detailed report on rad-hard electronics for pixel imaging, including hybridizations, testing results, and X-ray imaging. Key insights from speakers validate the focus on Deep SubMicron CMOS processes. Issues like Single Event Upset are addressed.
E N D
Pixel 2000 Genova – june 5-8, 2000http://www.ge.infn.it/Pix2000/slides.htmlInternal report • Overview • Rad-hard Sensors (Marina) • Rad-hard electronics • Hybridization • Pixel Module • Mechanics and cooling • Test beam results • Monolithic pixels and 3D pixels • X-ray imaging (…, HPD) • Miscellanea Pixel meeting June 12, 2000 G. Chiodini – Fermilab
Rad-hard electronics • All speakers and experimental results validate the Abder’s conclusion: “Deep SubMicron CMOS process is the right way to go” • ALICE2Test chip irradiated with X, g, and p survives up to 30 Mrad: W. Snoeys (ALICE beam test) and F.Meddi (ALICE review talk) • Review talks of P.F. Manfredi (FE) and P. Jarron (RH-FE) discussed about DSM: • Likely high yield and low cost. • Total Irradiated Dose Effect: outstanding performance with enclosed geometry and guard ring for n-channel Mosfets. • Single Event Latch-up: good immunity (DMILL is immune to it) • Single Event Gate Rupture: no evidence in ALICE2Test chip up to 9×1014 p/cm2. • Single Event Upset: is an issue (true for all technologies) solved only by circuit design techniques and became worse going to 0.18 or 0.15 micron. • Electrostatic Discharge Sensitive worse going to 0.18 or 0.15 micron. G. Chiodini - Fermilab
Hybridizations (1/3) • Talk review given by M. Caccia • Delphi experience • 106 pixels and 150 module • Final yield 36 % (not acceptable for ATLAS) • Real solutions are: • Indium bump-bonding (industrial standard, room temperature, UBM is not complicate). • Solder -above all flux less- (not industrial standard, UBM is complicate). • R. Horisberg: Development of indium bumping at PSI (some secret recipes) • Mass production (400 modules 2004-2005) • UBM made by companies • Reflow oven (for indium!) and Flip-chip for ATLAS pixel module • Spherical 20 mm diameter bumps after reflow • Bumps deposited only on the read out chip (for indium!) • Larger strength achieved • In (273psi) , In-Ag (800psi) , and In-Sn(1720psi) G. Chiodini - Fermilab
Hybridizations (2/3) • Round table discussion on bump-bonding • Industrial partners • AMS (Rome, indium) • IZM (Berlin, MCM-D module, solder, electroplating, reflow, 120minute/wafer all bumps inspection) • VTT electronics (Finland, solder, electroplating, reflow, no flux) • AIT (Usa) sent out an email (I am trying to have it) • Discussed topics • 8” wafer for 50 mm pitch (A. Mekkaui’s question) • Needed for DSM • No one is ready now • Module reworkability (M. Caccia’s question) • Homogeneous detachment and re-bonding • Cleaning the surfaces • Not a problem for indium but for solder (thermal shock at high T for the chip) • Mechanical stress of the sensor (M. Caccia’s talk: no problem for the indium) • Companies don’t like that: a reworkability line parallel to the production line • Large dead area probability (P. Delpierre’s question) • Opposite to random 10-5 failure rate quoted up to now • Impact on final yield G. Chiodini - Fermilab
Hybridizations (3/3) Alenia Marconi System (Rome) • Very simple process • T<500 C and no reflow for indium • Thinner chip bonded (lower T and lower P is enough to succeed) • Same evaporation system for every step • Wafer protected by photo resist in every step • High yield, but problems with dies • Wafer up to 6” • They are thinking about to go to 8’’ wafers • Investment in the deposition chamber to increase the size (several hundreds K$) • Other equipments are ready • C. Gemme: Study of indium bumping for the ATLAS pixel detector • 2pixels/Fechip failure rare • Threshold from 2000e to 4000e after bonding (7mm+7mm=8mm) G. Chiodini - Fermilab
Pixel module (1/2) • P.Netchaeva: results on 0.7% X0 thick pixel modules for the Atlas detector • 0.7% X0Material budget (Two metal layer?) • Silicon glue, thermo-camera test of T uniformity • One tested module from Boeing (150 mm thinned ROC by GDSI after bumping) • Two test module from AMS (156 mm thinned ROC by Okamoto after bumping) • P.Skubic: Flex Circuit designs for the Atlas pixel detector • Design rules, simulation with Maxwell-Spice link, and comparison with test bench • Wire bonding experience • Vendor experience • a lot of companies, only one produced non working sample • Cleo III experience with GE (General Electric Corporate Research and Development NY) • Flex hybrid Atlas module (LBL) beam test at CERN in May ’99 (SnPb bumps, good results) • C.Grah: Pixel-detector modules using MCM-D technology • Good bench test and beam test results presented • Personal informal discussion suggest to me that it is not reliable up to now G. Chiodini - Fermilab
Pixel module (2/2) • I. Gregor: Optical links for the ATLAS SCT and Pixel detector • Test on Rad-Hardness for SCT optical link (for Pixel optical link in the near future) • SEU can be fixed sending more light G. Chiodini - Fermilab
Beam Test • L.Perera: Diamond pixel detectors • W. Snoeys: OMEGA3 (ALICE+LHCb) chip in DSM process • irradiated with 9×1014 p/cm2 • the threshold is changed but not dramatically • M.Aleppo: A measurement of Lorentz angle of rad-hard pixel sensors • Model • Agreement test beam results and model • T. lari: A measurement of spatial resolution of Atlas pixel sensors • 6 mm telescope resolution • Large multiple scattering • Error prediction subtracted from the residual distribution gaussian sigma • Pixel module beam test already discussed G. Chiodini - Fermilab
Mechanics and cooling • M. Olcese: Mechanics and cooling for pixel detectors • Fluorocarbon coolants are the best choice for pixel (stable, good thermal properties, relatively low viscosity at low temperature) • Glue chip-support is an issue • Phone conversation about BTeV design G. Chiodini - Fermilab
Miscellanea • G. Bolla: Measurements of prototype pixel sensors for CMS • Analog data optical driver • Readout architecture bypassing bad chip or bad column or bad pixel in the token readout. • Controlling the single chip average rate to see if there are runaway in the system • The reset must be local • SEU about 1Hz • S. Seidel: Capacitance of Silicon pixels • Test bench for Atlas sensors • Cback plane = 10-20 fF about 15% total C • Cpspray =128 fF and Cpstop = 80 fF • CSeiko < CCiS (Why?) • Contribution to total C from first neighbors 11%, from after first neighbors 7% G. Chiodini - Fermilab