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Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design

Course and contest Results of Phase <3> <Ayad Mostafa>. Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design. Slide 1. Design and architecture 1. Adders: Carry Lookahead Adder (CLA) Fast Optimization Reduced foot print by limiting addition to 4-bits per stage

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Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design

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  1. Course and contest Results of Phase <3> <Ayad Mostafa> Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design Slide 1

  2. Design and architecture 1 • Adders: • Carry Lookahead Adder (CLA) • Fast • Optimization • Reduced foot print by limiting addition to 4-bits per stage • Introduced pipelining to sum up the 24-bits (6x 4-bits) • Carry Save Adder (CSA) • Fast • Result is not binary • Carry Save adder (using 5:3 compressors) • Fast • Result is not binary • Extra carry signal Slide 2

  3. Design and architecture 2 • Multiplier: • Fixed coefficient canonical signed digit(CSD) multiplier • Invert, shift and add operations • Optimizations • Down-scaled coefficient word length to 9-bits signed • Semi-Symmetrical coefficients → One less multiplier • Maximum 3 partial products plus 1 sign correction bit • Result is not binary Slide 3

  4. Design and architecture 4 x_in c Optional 5:3 comp Optional CSA sum carry Slide 4

  5. Design and architecture 5 9x multipliers 14x 5:3 compressors 36x registers N = 13 3x each x_in N = 0 pipelined cl-adder y_out Slide 5

  6. Synthesis • Pipelined Carry-Lookahead-Adder • Carry-Save-Adder • 5:3 Compressor • 9x Multipliers Slide 6

  7. Simulation Results Slide 7

  8. In All • Observations: • Gate-Level synthesis at lower level, using different libraries and components • More optimization capabilities • Compacter and faster implementation Slide 8

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