CS/COE0447 Computer Organization & Assembly Language

CS/COE0447Computer Organization & Assembly Language Chapter 2 Part 1

Topics to cover in Chapter 2 • MIPS operations and operands • MIPS registers • Memory view • Instruction encoding • Arithmetic operations • Logic operations • Memory transfer operations

MIPS Operations/Operands • “Operation” (instruction) • “Operand” • MIPS operations • Arithmetic operations (integer/floating-point) (add, sub,…) • Logical operations (and, or,…) • Shift operations (shift a certain number of bits to the left or right) • Compare operations (do something if one operand is less than another,…) • Load/stores to transfer data from/to memory • Branch/jump operations • System control operations/coprocessor operations • MIPS operands • General-purpose registers • Fixed registers, e.g., HI/LO registers • Memory location • Immediate value

MIPS Arithmetic rd rs rt • <op> <rdestination> <rsource1> <rsource2> • All arithmetic instructions have 3 operands • Operand order is fixed: destination first • 32 registers (page 2 of green card) • Examples • add $t0, $s0, $s2 # $t0 = $s0 + $s2 • sub $s0, $t0, $t1 # $s0 = $t0 – $t1

32 bits 32 bits 32 bits MIPS Registers $zero r0 r16 $s0 HI $at r1 r17 $s1 LO $v0 r2 r18 $s2 $v1 r3 r19 $s3 $a0 r4 r20 $s4 $a1 r5 r21 $s5 $a2 r6 r22 $s6 $a3 r7 r23 $s7 $t0 r8 r24 $t8 $t1 r9 r25 $t9 $t2 r10 r26 $k0 $t3 r11 r27 $k1 $t4 r12 r28 $gp $t5 r13 r29 $sp $t6 r14 r30 $fp $t7 r15 r31 $ra PC General-Purpose Registers Special-Purpose Registers

General-Purpose Registers • GPR: all can be used as operands in instructions • Still, conventions and limitations exist to keep GPRs from being used arbitrarily • r0, termed $zero, always has a value “0” • r31, termed $ra (return address), is reserved for subroutine call/return • Etc. (we’ll see others later) • Register usage and related software conventions are summarized in “application binary interface” (ABI), which is important when writing system software such as an assembler and a compiler

Instruction Encoding • Instructions are encoded in binary numbers • Assembler translates assembly programs into binary numbers • Machine decodes binary numbers to figure out what the instruction is • MIPS has “fixed” 32-bit instruction encoding • MIPS has several instruction formats • R-format: arithmetic instructions • I-format: transfer/branch/immediate format • J-format: jump instruction format • (FI/FR-format: floating-point instruction format)(later chapter)

MIPS Instruction Formats

6 5 5 5 5 6 opcode rs rt rd shamt funct R-Format Instructions • Define “fields” of the following number of bits each: 6 + 5 + 5 + 5 + 5 + 6 = 32 • For simplicity, each field has a name: For shift instructions: “shift amount”

R-Format Example • MIPS Instruction: add $8,$9,$10 Decimal number per field representation: Binary number per field representation: hex representation: decimal representation: On Green Card: Format in column 1, opcodes in column 3 (Let’s look and then come back)

M I P S Reference Data: CORE INSTRUCTION SET (1) May cause overflow exception (2) SignExtImm = { 16{immediate[15]}, immediate } (3) ZeroExtImm = { 16{1b’0}, immediate } (4) BranchAddr = { 14{immediate[15]}, immediate, 2’b0} Later

6 5 5 5 5 6 opcode rs rt rd shamt funct R-Format Instructions (REMINDER) • Define “fields” of the following number of bits each: 6 + 5 + 5 + 5 + 5 + 6 = 32 • For simplicity, each field has a name:

R-Format Example • MIPS Instruction: add $8,$9,$10 Decimal number per field representation: Binary number per field representation: Now let’s fill this in

000000 0 01001 9 01010 10 01000 8 00000 0 100000 32 hex R-Format Example • MIPS Instruction: add $8,$9,$10 Decimal number per field representation: Binary number per field representation: hex representation: 012A 4020hex decimal representation: 19,546,144ten

I-Format Instructions • Define “fields” of the following number of bits each: 6 + 5 + 5 + 16 = 32 6 5 5 16 • For simplicity, each field has a name: opcode rs rt immediate Let’s do an example using addi

M I P S Reference Data: CORE INSTRUCTION SET (1) May cause overflow exception (2) SignExtImm = { 16{immediate[15]}, immediate } (3) ZeroExtImm = { 16{1b’0}, immediate } (4) BranchAddr = { 14{immediate[15]}, immediate, 2’b0}

I-Format Example • MIPS Instruction: addi $8,$9,7 Decimal number per field representation: Binary number per field representation:

hex I-Format Example • MIPS Instruction: addi $8,$9,7 Decimal number per field representation: Binary number per field representation: hex representation: FILL IN THESE VALUES!!!!!

M I P S Reference Data: CORE INSTRUCTION SET (1) May cause overflow exception (2) SignExtImm = { 16{immediate[15]}, immediate } (3) ZeroExtImm = { 16{1b’0}, immediate } (4) BranchAddr = { 14{immediate[15]}, immediate, 2’b0}

Executing the addi instruction addi $8,$9,7 Suppose  Instruction from earlier slide: format. Immediate = 0x0007 FINISH THIS!!!! So, you add 00000023 00000007

Logic Instructions • Bit-wise logic operations • <op> <rdestination> <rsource1> <rsource2> • Examples • and $t0, $s0, $s2 # $t0 = $s0 ^ $s2 • or $s0, $t0, $t1 # $s0 = $t0 | $t1 • nor $s0, $t0, $t1 # $s0 = ~($t0 | $t1) • xor $s0, $t0, $t1 # $s0 = $t0 ^ $t1

Dealing with Immediates • Many operations involve small “immediate value” • a = a + 1; • b = b – 4; • c = d | 0x04; • Some frequently used arithmetic/logic instructions have their “immediate” version • addi $t0, $t1, 16 # t0 <- $t1 + 16 • andi $t2, $t3, 254 # t2 <- $t3 & 0xfe • ori $t5, $t6, 4 # t5 <- $t6 | 0x04 • xori $t7, $t7, 16 # t7 <- $t7 ^ 0x10 • There is no “subi”; Why?

1010101001010101 0000000000000000 1010101001010101 1100110000110011 Long Immediates • Sometimes we need a long immediate, e.g., 32 bits • Do we need an instruction to load a 32-bit constant value to a register? • MIPS requires that we use two instructions • lui $t0, 1010101001010101 • Then we get lower-order 16 bits • ori $t0, $t0, 1100110000110011 $t0 $t0

Memory Transfer Instructions • Only two instructions provided • LOAD: move data from memory to register • lw $t3, 4($t2) # $t3 <- M[$t2 + 4] • STORE: move data from register to memory • sw $t4, 16($t1) # M[$t1 + 16] <- $t4 • Support for other data types than 32-bit word needed • 16-bit half-word • “short” type in C • 16-bit processing is common in signal processing • lh/sh (load half/store half) • 8-bit byte • “char” type in C • 8-bit processing is common in controller applications • lb/sb (load byte/store byte)

Address Calculation • Memory address is specified with (register, constant) • Register to keep “base address” • Constant field to keep “offset” • Address is “base address” + “offset”, i.e., register + constant • The offset can be positive or negative • It is written in terms of number of bytes for load/store instructions • If no register needs to be used then use register 0 • Register 0 always stores value 0 (“hardwired”) • If no offset, then offset is 0 • MIPS uses this simple address calculation method, but other architectures such as PowerPC or x86 have different methods

void swap(int v[], int k) { int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; } Machine Code Example swap: sll $t0, $a1, 2 add $t1, $a0, $t0 lw $t3, 0($t1) lw $t4, 4($t1) sw $t4, 0($t1) sw $t3, 4($t1) jr $ra

Memory View • Viewed as a large, single-dimension 8-bit array with an address (“byte address”) • A memory address is an index into the array BYTE 0 BYTE 1 BYTE 2 BYTE 3 BYTE 4 BYTE 5 …

Memory Organization • 232 bytes with byte addresses from 0 to 232 – 1 • 230 words with byte addresses 0, 4, 8, …, 232 – 4 • Words are aligned • 2 least significant bits of address are 0s • Half-words are aligned • LSB of address is 0 • Addressing within a word • Which byte is first and which byte is last? • Big-endian vs. Little-endian 0 WORD 4 WORD 8 WORD 12 WORD 16 WORD 20 WORD … MSB LSB 0 0 1 2 3 MSB LSB 0 3 2 1 0

Peer Instruction: $s3=i, $s4=j, $s5=@A Loop: addiu $s4,$s4,1 # j = j + 1 sll $t1,$s3,2 # $t1 = 4 * i addu $t1,$t1,$s5 # $t1 = @ A[i] lw $t0,0($t1) # $t0 = A[i] slti $t1,$t0,10 # $t1 = $t0 < 10 beq $t1,$0, Loop # goto Loop [not delayed] addiu $s3,$s3,1 # i = i + 1 slti $t1,$t0, 0 # $t1 = $t0 < 0 bne $t1,$0, Loop # goto Loop [not delayed] do j = j + 1 while (______); What C code properly fills in the blank in loop on right? 1: A[i++] >= 102: A[i++] >= 10 | A[i] < 03: A[i] >= 10 || A[i++] < 04: A[i++] >= 10 || A[i] < 05: A[i] >= 10 && A[i++] < 06 None of the above

Peer Instruction Which instruction has same representation as 35ten? A.add $0, $0, $0 B.subu $s0,$s0,$s0 C.lw $0, 0($0) D.addi $0, $0, 35 E.subu $0, $0, $0 F.Trick question!Instructions are not numbers • Use Green Card handout to answer

More on Alignment • A misaligned access • lw $t1, 3($zero) • How do we define a word at address 3? • Data 0, 1, 2, 3 • If you meant this, use address 0 instead of 3 • Data 3, 4, 5, 6 • If you meant this, it is misaligned! • Certain hardware may support this, but usually not • Get a byte from address 3, a word from address 4 and manipulate data to get what you want • Alignment issue does not exist for byte accesses 0 0 1 2 3 4 4 5 6 7 8 8 9 10 11 …

Shift Instructions • Bit-wise logic operations • <op> <rdestination> <rsource> <shamt> • Examples • sll $t0, $s0, 4 # $t0 = $s0 << 4 • srl $s0, $t0, 2 # $s0 = $t0 >> 2 • Shift amount can be in a register (“shamt” field not used) • Shift right arithmetic (SRA) keeps the sign of a number • sra $s0, $t0, 4

if (i == h) h =i+j; (i == h)? bne $s0, $s1, LABEL add $s3, $s0, $s1 LABEL: … h=i+j; LABEL: Control • Decision-making instructions • Alter the control flow, i.e., change the “next” instruction to be executed • MIPS conditional branch instructions • bne $t0, $t1, LABEL • beq $t0, $t1, LABEL • Example YES NO

if (i == h) f=g+h; else f=g–h; bne $s4, $s5, ELSE add $s3, $s4, $s5 j EXIT ELSE: sub $s3, $s4, $s5 EXIT: … YES NO (i == h)? f=g+h; f=g–h EXIT Control, cont’d • MIPS unconditional branch instruction (jump) • j LABEL • Example • f, g, and h are in registers $s3, $s4, and $s5

Control, cont’d • Loops • “while” loops • Example on page 74 • “for” loops

if (s1<s2) t0=1; else t0=0; slt $t0, $s1, $s2 Control, cont’d • We have beq and bne; what about branch-if-less-than? • slt • Can you make a “pseudo” instruction “blt $s1, $s2, LABEL”? • Assembler needs a temporary register to do this • $at is reserved for this purpose

4 17 18 25 Instruction Format • Address in the instruction is not a 32-bit number – it’s only 16-bit • The 16-bit immediate value is in signed, 2’s complement form • Addressing in branch instructions • The 16-bit number in the instruction specifies the number of “instructions” to be skipped • Memory address is obtained by adding this number to the PC • Next address = PC + 4 + sign_extend(16-bit immediate << 2) • Example • beq $s1, $s2, 100

2 2500 Instruction Format, cont’d • The address of next instruction is obtained by concatenating with PC • Next address = {PC[31:28],IMM[25:0],00} • Address boundaries of 256MB • Example • j 10000

op op op op op op rs rs rs rs rs shamt rd rt rt rt rt rt immediate immediate offset offset funct 26-bit address MIPS Addressing Modes • Immediate addressing (I-format) • Register addressing (R-/I-format) • Base addressing (load/store) [register + offset] • PC-relative addressing (beq/bne) [PC + 4 + offset] • Pseudo-direct addressing (j) [concatenation w/ PC]

Summary

Register Usage Convention

Stack and Frame Pointers • Stack pointer ($sp) • Keeps the address to the top of the stack • $29 is reserved for this purpose • Stack grows from high address to low • Typical stack operations are push/pop • Procedure frame • Contains saved registers and local variables • “Activation record” • Frame pointer ($fp) • Points to the first word of a frame • Offers a stable reference pointer • $30 is reserved for this • Some compilers don’t use $fp

void swap(int v[], int k) { int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; } swap: muli $2, $5, 4 add $2, $4, $2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 00000000101000010… 00000000000110000… 10001100011000100… 10001100111100100… 10101100111100100… 10101100011000100… 00000011111000000… assembler compiler “C Program” Down to “Numbers”

To Produce an Executable source file .asm/.s object file .obj/.o assembler source file .asm/.s object file .obj/.o executable .exe assembler linker source file .asm/.s object file .obj/.o library .lib/.a assembler

An Assembler • Expands macros • Macro is a sequence of operations conveniently defined by a user • A single macro can expand to many instructions • Determines addresses and translates source into binary numbers • Start from address 0 • Record in “symbol table” addresses of labels • Resolve branch targets and complete branch instructions’ encoding • Record instructions that need be fixed after linkage • Packs everything in an object file • “Two-pass assembler” • To handle forward references

An Object File • Header • Size and position of other pieces of the file • Text segment • Machine codes • Data segment • Binary representation of the data in the source • Relocation information • Identifies instructions and data words that depend on absolute addresses • Symbol table • Keeps addresses of global labels • Lists unresolved references • Debugging information • Contains a concise description of the way in which the program was compiled

Assembler Directives • Guides the assembler to properly handle following codes with certain considerations • .text • Tells assembler that codes follow • .data • Tells assembler that data follow • .align • Directs aligning the following items • .global • Tells to treat the following symbol as global • .asciiz • Tells to handle the following as a “string”

Code Example .text .align 2 .globl main main: subu $sp, $sp, 32 … loop: lw $t6, 28($sp) … la $a0, str lw $a1, 24($sp) jal printf … jr $ra .data .align 0 str: .asciiz “The sum from 0 … 100 is %d\n”

.data int_str: .asciiz “%d” .text .macro print_int($arg) la $a0, int_str mov $a1, $arg jal printf .end_macro … print_int($7) la $a0, int_str mov $a1, $7 jal printf Macro Example

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CS/COE0447 Computer Organization & Assembly Language