Variants of Turing Machines: Multitape Turing Machines and Simulating on a Computer

1. Fall 2010 The Chinese University of Hong Kong CSCI 3130: Automata theory and formal languages Variants of Turing Machines Andrej Bogdanov http://www.cse.cuhk.edu.hk/~andrejb/csc3130

2. The Church-Turing Thesis All arguments [for the CT Thesis] which can be given are bound to be, fundamentally, appeals to intuition, and for this reason rather unsatisfactory mathematically. The arguments which I shall use are of three kinds: 1. A direct appeal to intuition 2. A proof of the equivalence of two definitions (In case the new definition has greater intuitive appeal) 3. Giving examples of large classes of numbers [languages] which are computable. 1936: “On Computable Numbers, with an Application to the Entscheidungsproblem” Section 9. The extent of the computable numbers

3. The multitape Turing Machine • The transition may depend on the contents of all the cells • Different tape heads can be moved independently … … control … tape 1 tape 2 tape 3 0 0 1 0 1 1 0 0

4. The multitape Turing Machine • Multiple tapes are convenient, e.g. one can serve as temporary storage … … … 0/1R☐/1R 0/0L … … q3 q7 … 1 1 0 1 1 0 0 0 1 1 1 0 1 0 0 0 0

5. The multitape Turing Machine Multitape Turing Machines are equivalent to single-tape Turing Machines … … M G = {0, 1, ☐} … 1 0 0 0 1 1 0 0 S …    # 0 1 0 # 0 1 # 1 0 0 # G’ = {0, 1, ☐, 0, 1, ☐, #}   

6. Simulating a multitape TM • We show how to simulate a multitape TM on an ordinary (single tape TM) • To be specific, let’s do a 3-tape TM … … … x1 x2 xa xi … … … #x1x2...xa...xi#y1y2...yb...yj#z1z2...zc...zk#   y1 y2 yb yj  … … z1 zc zk Single-tape TM Multitape TM

7. Simulating a multitape TM Single-tape TM: Initialization w1w2...wn #w1w2...wn#☐#☐# #w1w2...wn#☐#☐#       … …    0 1 0 # 0 1 0 # # # S: On input w1...wn: Replace tape contents by 1. Remember that M is in state q0

8. Simulating a multitape TM Single-tape TM: Simulating Multitape TM moves Suppose Multitape TM wants to move like this:    # 0 1 0 # 0 1 # 1 0 0 # … … 0 1 0 1 1 0 … … 0 1 0 1 1 0/1R☐/1R 0/0L … … 1 0 0 1 0 0 q3 q7 We simulate move on single-tape TM like this:    # 0 1 0 # 0 1 # 1 0 0 #

9. Simulating a multitape TM S: On input w1...wn: #w1w2...wn#☐#☐#  Remember (in state) that M is in state q0   To simulate a step of M: 2. Make a pass over tape to find x, y, z    x/x’Ay/y’B z/z’C qi qj #x1x2...x...xi#y1y2...y...yj#z1z2...z...zk#    If M is in state qi and has transition update state / tape accordingly. Replace tape contents by 1. If M reaches accept (reject) state, accept (reject). 3.

10. Doing simulations • To simulate a model M by another model N: 1. Say how the state and storage of N is used to represent the state and storage of M 2. Say what should be initially done to convert the input of N (if anything) 3. Say how each transition of M can be implemented by a sequence of transitions of N

11. What does a computer look like? CPU instruction memory PC 0000 arithmeticlogical unit data memory R0 0100 R1 1010 registers R2 0000 R3 0000

12. What does a computer look like? CPU instruction memory 0000 load 0001 0001 write R3 0010 store R5 0011 add R5 0100 jpos 0011 ... PC 0000 arithmeticlogical unit R0 0100 R1 data memory 1010 registers R2 0000 0000 0001 0010 0011 0100 R3 0000 0110 0110 0110 0110 0110

13. Instruction set load x Put the value x into R0 load Rk Copy the value of Rk into R0 store Rk Copy the value of R0 into Rk read Rk Copy the value at memory location Rk into R0 write Rk Copy the value of R0 into memory location Rk add Rk Add R0 and Rk, and put result in R0 jump n Set PC to n jzero n Set PC to n, if R0 is zero jpos n Set PC to n, if R0 is positive

14. Random access machines instruction meaning programcounter PC 0 0 1 2 3 4 5 load -7R0 := -7 write R2M[R2] := R0 store R1R1 := R0 add R1R0 := R0 + R5 jzero 3 if R0 = 0then PC := 3 accept registers R0 0 R1 0 R2 0 … M 2 1 2 2 0 memory 1 2 3 4 0 It has registers that can store integer values, aprogram counter, and a random-access memory

15. Random access machines instruction meaning • The instructions are indexed by the program counter • Initially, the input is in the first k memory cells, all registers and PC are set to 0 PC 0 1 2 0 1 2 3 4 5 load 7R0 := 7 write R2M[R2] := R0 store R1R1 := R0 add R1R0 := R0 + R1 jzero 3 if R0 = 0then PC := 3 accept 3 4 5 R0 0 7 14 R1 0 7 R2 0 … M 0 0 0 0 0 -7 1 2 3 4 0

16. Random access machines • Simulating a Turing Machine on a RAM: Random access machines are equivalent to Turing Machines M … 1 2 1 head PC G = {0, 1, 2, ..., k} tape R0 2 blank … M 1 2 1 0 0

17. Simulating a TM on a RAM program M 1/2R 0 store R1handle for state q0 0 1 2 3 6 7 8 9 10 store R1save head positionread R1read tape contents x add -1 jzero 6if x = 1 goto line 6 load 2 new value of cell write R1 write in memory load R1 recall head position add 1 move head to right jump 30 go to state q1 q0 q1 … 1 2 1 PC 0 … R0 0 30 store R1handle for state q1 … R1 0 200 accepthandle for state qacc M 1 2 1

18. Simulating a TM on a RAM program M 1/2R 0 store R1handle for state q0 0 1 2 3 6 7 8 9 10 store R1save head positionread R1read tape contents x add -1 jzero 6if x = 1 goto line 6 load 2 new value of cell write R1 write in memory load R1 recall head position add 1 move head to right jump 30 go to state q1 q0 q1 … 1 2 1 3 2 2 0 … 1 (head) R0 2 30 store R1handle for state q1 … 2 R1 0 (tape) 2 M 1 2 1

19. Simulating a RAM on a Turing Machine • The configuration of a RAM consists of • Program counter • Contents of registers • Indices and contents of all nonempty memory cells PC 14 configuration = (14, 3, 17, 5, (0, 2), (2, 1), (3, 2)) R0 3 R1 17 R2 5 … M 2 0 1 2 0 0 1 2 3 4

20. Simulating a RAM on a 2-tape TM • The TM has a simulation tape and a scratch tape • The simulation tape stores RAM configuration • The TM has a set of states corresponding to eachprogram instruction of the RAM • The TM tape is updates according to RAM instruction M (14,3,17,5,(0,2),(2,1),(3,2))

21. Simulating a RAM on a 2-tape TM Initialization TM input: 122 RAM initial state: PC 0 R0 0 ... M 1 2 2 0 S: On input w1...wn: Replace tape contents by 1. (0, 0, 0, ..., 0, (0, w1), (1, w2), ..., (n-1, wn))

22. Simulating a RAM on a 2-tape TM • Example: load R1 c (14,3,17,5,(0,2),(2,1),(3,2)) s c 4. Update PC 1. Copy R1 to scratch tape (15,17,17,5,(0,2),(2,1),(3,2)) 17 2. Write R1 to conf tape c (14,1,17,5,(0,2),(2,1),(3,2)) s 17 Make more spaceas needed . c (14,1,17,5,(0,2),(2,1),(3,2) ) . 3. Erase scratch tape c (14,1 ,17,5,(0,2),(2,1),(3,2)) c (14,17,17,5,(0,2),(2,1),(3,2))

23. Simulating a RAM on a 2-tape TM S: On input w1...wn: Replace tape contents by 1. (0, 0, 0, ..., 0, (0, w1), (1, w2), ..., (n-1, wn)) 2. Simulate instruction in RAM program by a sequence of TM transitions See notes for details. 3. If RAM instruction is accept, go to accept state. If RAM instruction is reject, go to reject state.