ECP2036 Microprocessor and Interfacing

1. Registers Control & Status Registers User-Visible Registers Program Counter General-Purpose Reg. Instruction Register Address Register ... Data Register ... Flag Register ECP2036 Microprocessor and Interfacing

2. ECP2036 Microprocessor and Interfacing To hold the memory address of the next instruction to be executed Control & Status Registers User-Visible Registers Program Counter General-Purpose Reg. Instruction Register Address Register ... Data Register Default value at power on/reset: PC = 0000H or FFFFH (or other address predetermined by the manufacturer) ...

3. ECP2036 Microprocessor and Interfacing To hold the instruction fetched from external memory Control & Status Registers User-Visible Registers Program Counter General-Purpose Reg. Instruction Register Address Register ... Data Register ... Flag Register

4. ECP2036 Microprocessor and Interfacing Can be assigned to a variety of functions by programmer Control & Status Registers User-Visible Registers Program Counter General-Purpose Reg. Instruction Register Address Register ... Data Register ... Flag Register

5. ECP2036 Microprocessor and Interfacing To hold the address of next memory location to be addressed Control & Status Registers User-Visible Registers Program Counter General-Purpose Reg. Instruction Register Address Register ... Data Register ... Flag Register

6. ECP2036 Microprocessor and Interfacing To hold the data fetched from memory User-Visible Registers Program Counter General-Purpose Reg. Instruction Register Address Register ... Data Register ... Flag Register

7. ECP2036 Microprocessor and Interfacing Condition-code register that contains a number of flag bits. Control & Status Registers Each flag bit is either set (“1”) or reset (“0”) by the result of an arithmetic or logical instruction that has just been executed General-Purpose Reg. Instruction Register Address Register ... Data Register ... Flag Register

8. Memory Memory Location-1 Memory Address-1  Memory Address-2  Memory Location-2 1 2 3 4 5 6 7 8 1 word = 8-bit data (for 8051) Memory Address-n  Memory Location-n ECP2036 Microprocessor and Interfacing

9. ECP2036 Microprocessor and Interfacing Bus System (I) Address Bus These are the wires that carry the CPU generated address signals out to memory and to I/O devices. The address signals only travel outwards from the CPU (unidirectional). The number of address lines that a microprocessor has determines the size of the memory space that it can access.

10. ECP2036 Microprocessor and Interfacing Memory Size

11. ECP2036 Microprocessor and Interfacing Bus System (II) Data Bus These are the data signals that travel out of and into the P (bi-directional). The number of wires in the data bus depends on the word size that the P operates with. An 8-bit P will have a data bus consisting of 8 wires and a 32-bit P will have a data bus with 32 wires.

12. ECP2036 Microprocessor and Interfacing Bus System (III) Control Bus The control bus consists of wires, some of which carry signals from the CPU to external devices, while others carry signals from external devices to the CPU. The number of wires present in the control bus varies from one P to another. Examples of control bus signals are READ/, WAIT, READY, and HOLD.

13. ALU I/O Main Memory CU ECP2036 Microprocessor and Interfacing von Neumann Architecture

14. Start End Fetch Instruction ECP2036 Microprocessor and Interfacing Basic Instruction Cycle PC = 0000H Fetch Cycle PC = PC + n Execute Instruction Execute Cycle

15. The CPU sends out the control signals Memory Request and Read to indicate that it wants to read from memory Read Memory request Data bus Address bus CPU places address (XXXX) of the memory location on the address bus ECP2036 Microprocessor and Interfacing Memory Read Operation - Step 1 CPU Memory

16. Read Memory request Data bus Address bus Memory places data from the accessed location onto the data bus ECP2036 Microprocessor and Interfacing Memory Read Operation - Step 2 Accessed location at XXXX CPU Memory

17. The CPU removes the Memory Request and Read signals Read Read Memory request Memory request Register Data bus Address bus CPU latches the data into a register ECP2036 Microprocessor and Interfacing Memory Read Operation - Step 3 CPU Memory

18. The CPU sends out a Memory Request control signal to indicate that it wants to perform a memory operation Memory request Data bus Address bus CPU places address (YYYY) of the memory location on the address bus ECP2036 Microprocessor and Interfacing Memory Write Operation - Step 1 CPU Memory

19. The CPU sends out a Write control signal to indicate that valid data is available on the data bus Write Register Data bus Address bus CPU places the data from a register onto the data bus ECP2036 Microprocessor and Interfacing Memory Write Operation - Step 2 CPU Memory Memory request

20. Write The CPU removes the Write signal to complete the memory write operation Memory request Data bus Address bus Memory copies the data bus into the accessed location ECP2036 Microprocessor and Interfacing Memory Write Operation - Step 3 CPU Write Memory Memory request Register Accessed location at YYYY

21. ECP2036 Microprocessor and Interfacing Assembly Language Program An assembly language program is a program written using labels and mnemonics, in which each statement corresponds to a machine instruction. ; A test program ORG 0000H MOV A, #01H LOOP: RL A MOV P1, A ; output to port 1 JMP LOOP END

22. program.obj program.src asm51 program.lst ECP2036 Microprocessor and Interfacing Assembling A Source Program An assembler is a program that translate an assembly language program into a machine language program.

23. program File3.obj File2.obj File1.obj RL51 program.m51 ECP2036 Microprocessor and Interfacing Linking Object Files A linker/locator is a program that combines relocatable object programs (modules) and produces an absolute object program that is executable by a computer.

24. program.bin program.hex OH Download to 8051 ECP2036 Microprocessor and Interfacing BIN to HEX conversion