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The Patti Board

The Patti Board. Gianluca Lamanna ( INFNPisa ) TEL62 workshop – Pisa – 30 .1.2014. The PATTI board. The PATTI board is a TELL1/TEL62 daughter board Same TDCB form factor Main purpose: pulser for TDCB 128 LVDS channels per board ( 512 channels per TELL1/TEL62)

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The Patti Board

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  1. The Patti Board Gianluca Lamanna (INFNPisa) TEL62 workshop – Pisa – 30.1.2014

  2. The PATTI board • The PATTI board is a TELL1/TEL62 daughter board • Same TDCB form factor • Main purpose: pulser for TDCB • 128 LVDS channels per board (512 channels per TELL1/TEL62) • Same TDCB connectors • Firmware, performance and primitive production stress test. • Additional features: standalone testbench • LTU interface: you don’t need any L0TP to produce triggers • Production of SOB/EOB: you don’t need any «SPS» • Choke/error signals: test of readout perfomance • Versatility: • All the functions are controlled with PP firmware • Five boards in production: Birmingham, Frascati, Napoli e Perugia + spare

  3. Very simple board: DS90LV047 translators

  4. PATTI layout • I/O: • 4 lemos (SOB, EOB, TRIGGER, SPARE) • LTU connector • 8 LEDS • Choke/errorreceiver SAMTEC 200 pins – TEL62 connector TDC connectors • The logicwill be done in the PP • IndependentSOB,EOB production • Trigger and choke/error • Interface with LTU LVTTL-LVDS translators Power from Murata connectors: 3.3V and +5V,-5V

  5. PATTI board Power TDCB connectors Tell1 connector

  6. PATTI board Choke & Error LEDs SOB, EOB, Trigger, Spare LTU

  7. Why you need a PATTI? • The PATTI is a pulser+”standalone” trigger processor Choke/Error PATTI TDCB TEL62 TELL1/TEL62 TTCex LTU Sob/eob TTC

  8. Firmware

  9. Choke/error generation • Inspill and outspill time • Sob/eob signals to the LTU • Trigger sob/eob generation

  10. Pulser • Customizable clock (several possibilities) to read a memory  timeslot • The memory is 32bx512 • Each line is the configuration of all the channels in a timeslot • An external signal can be used to trigger the reading of the memory

  11. Trigger generation • Several possibilities to generate the trigger: • Each pulse is a trigger • Downscaled • Random or periodic uncorrelated with the pulser • Memory • external

  12. Preliminary manual

  13. PATTI controller • Configure the frequency of the pulser independently for each connector

  14. 512 timeslotsavailable for ch. Configuration • Ex: 0x0000000F ch.#0,1,2,3 ON 0x000000F0 ch.#4,5,6,7 ON 0x0000000F ch.#0,1,2,3 ON ……….

  15. Individualchannelmasking

  16. Trigger correlated/uncorrelated with the pulsers • Choke/error, programmableburst

  17. Status X X X X (80%) X X X X X X X X X (50%) X X X X X (20%)

  18. Conclusions • The PATTI is very useful build a complete test bench in the lab, both to test TDC capabilities and primitives generation • The required board are in production (for the moment we have 4 boards in Pisa and 1 board at CERN) • Firmware validation test will be completed in the soon • What you need: • TEL62+TDCB to test, LTU+TTCex (in any case PATTI can produce triggers on LEMO), TDCB cables, some lemo and… . • …for the moment you need a TELL1 • Version for TEL62foreseen • Manual in preparation • GUI for control in preparation • TDSPY control in preparation

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