Clock Synchronization. Slides by Prof. Jennifer Welch. Hardware Clocks. Suppose processors have access to some approximation of real time. Mechanism is through hardware clocks, one at each processor. p i 's hardware clock HC i is modeled as a function from real times to clock times.
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Prof. Jennifer Welch
ACi(t) = HCi(t) + adji(t)
If hardware clocks don't drift, then once clocks are adjusted, they stay the same distance apart.
Achieving -synchronized clocks:
[d-u,d]; call u the uncertainty
adj0 := 0
send HC0 to p1
when receive T from p0:
adj1 := (T + d - u/2) - HC1
Two different timed views with the same (untimed) view:
h/w clock times
3:00 3:05 3:10 4:00
11:15 11:20 11:45 11:52
h/w clock times
3:00 3:05 3:10 4:00
8:08 9:00 9:10 10:10
Given a set of timed views, one per proc:
To prove lower bounds on skew:
Given timed execution and real numbers x0, x1, …, xn-1,
shift(,(x0, x1, …, xn-1)) is created by:
Result of shifting and merging might not be admissible: could shift receipt of a message earlier than its sending, for example.
But these facts hold:
HC'i(t) = HCi(t - xi) = HCi(t) - xi
- xi + xjsince msg is sent xilater and received xjlater
(1) AC0 ≥ AC1 -
AC'1 ≥ AC'0 -
AC'1 ≥ AC'0 - implies
AC1 ≥ (AC0 + u) - since AC'1 = AC1 and
AC'0 = AC0 + u
Remember inequality (1):
AC0 ≥ AC1 -
≥ (AC0 + u - ) - (from just above)
initially diffi[i] = 0
send HCito all procs
when receive T from pj:
diffi[j] := (T + d - u/2) - HCi
when heard from all procs:
adji := (1/n)∑diffi[k]
k = 0
|ACi - ACj|
HCi + (1/n)∑diffi[k]
|ACi - ACj| ≤ (X + Y + Z)/n where
error in pj's estimate of the difference between its clock and pi's clock, at most u/2
error in pi's estimate of the difference between its clock and pj's clock, at most u/2
|diffi[k] - (HCk - HCi)| + |diffj[k] - (HCk - HCj)|
error in pi's estimate of pk's clock plus error in pj's estimate of pk's clock, at most u/2 + u/2 = u.
To finish up,
|ACi - ACj| ≤ (u/2 + u/2 + (n-2)u)/n
= u(1 - 1/n).
Theorem (6.17): No algorithm can achieve -synchronized clocks for < u(1-1/n).
Lemma (6.18):ACk-1 ≤ Ak - u + , for all k.
Take and shift p0through pk-1 earlier by u:
' = shift(,(-u,…,-u,0,…,0))
Verify that ' is admissible by checking that messages delays are in range:
Ak-1' ≤ Ak' +
Ak-1' = Ak-1 + u and Ak' = Ak
After termination in :
An-1 ≤ A0 + by correctness of algorithm
≤ A1 - u + 2 by Additive Lemma
≤ A2 - 2u + 3 by Additive Lemma
≤ An-1 - (n-1)u + n by Additive Lemma
Thus ≥ u(1 - 1/n).
(1 + )-1(t2 - t1) ≤ HCi(t2) - HCi(t1)
≤ (1 + )(t2 - t1)
real time t
For quartz crystal clocks, is about 10-6
Clock Agreement: There exists s.t. for all i and j, and all real times t:
|ACi(t) - ACj(t)| ≤
Clock Validity: There exists > 0 s.t. for all i and all real times t:
(1 + )-1(HCi(t) - HCi(0)) ≤ ACi(t) - ACi(0)
≤ (1 + )(HCi(t) - HCi(0))
When taking the "long view", adjusted clocks measure elapsed time approximately as well as the hardware clocks.
2:00 3:00 4:00 6:00
HC0(t) = 3t
delay = 1:00
HC1(t) = 4t
scale by s = 2
HC'0(t) = (3/2)t
delay = 2:00
HC'0(t) = 2t
Lemma (13.1): In ' = scale(,s),
Lemma (13.2): If satisfies -clock agreement and -clock validity for a set of procs, then so does scale(,s).
and adj. vars
are initially 0
d(1+)0 = d
Lemma (13.4): In , for all t:
Proof: Take pi and pi+1 from big ring and put them in a triangle in which 3rd processor is faulty and acts like the rest of the big ring. Call this execution .
Claim:piand pi+1 behave the same in (the execution on the triangle with the Byzantine processor) as they do in (the execution on the big ring).
Scale by (1 + )-2i to get ' :
acts like pi-1
toward pi in
acts like pi+2
toward pi+1 in
≥ d - u by assump.
Referring back to ,
AC0(t)≤ AC1(t) + by Lemma 13.4(a)
≤AC2(t) + 2 by Lemma 13.4(a)
≤ ACk-1(t) + (k-1) by Lemma 13.4(a)
So ACk-1(t) ≥ AC0(t) - (k-1)
≥ (1+)-1HC0(t) - (k-1) by Lemma 13.4(b)
= (1+)-1(1+)2(k-1)HCk-1(t) - (k-1)
From previous slide:
ACk-1(t) ≥ (1+)-1(1+)2(k-1)HCk-1(t) - (k-1)
By Lemma 13.4(b):
ACk-1(t) ≤ (1+)HCk-1(t)
Combining and rearranging gives:
HCk-1(t) [(1+)-1(1+)2(k-1)- (1+)] ≤ (k-1)
positive, by assumption about k
[Welch & Lynch, 1988]
when AC = kP (k = 1, 2, …):
send AC to all
set timer for (1 + )(B + d) in the future
when receive T msg from pj:
diff[j] := (T + d - u/2) - AC
when timer goes off:
adj := adj + midpoint(trim(f,diff))
clear diff array
discard f largest
and f lowest values
Claim: Nonfaulty clocks reach each kP within B real time of each other.
Claim: After adjusting their clocks in each resynch period, the new (nonfaulty) clocks reach kP within real time B/2 + u + O() of each other. See figure.
at most B
B/2 + u + O()
implies B ≥ 2u + 4P
= 2u + O()
Claim: The algorithm achieves -clock agreement, where
= B + u/2 + O()
Using the smallest possible B, the best this algorithm gives is
= 5u/2 + O().