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Chapter 5

Chapter 5. Arithmetic and Logic Instructions. Introduction. arithmetic instruction : addition, subtraction, multiplication, division, comparison, negation, increment, decrement logic : AND, OR, EX-OR, shifts, rotates, logical comparison(TEST) 386~ :

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Chapter 5

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  1. Chapter 5 Arithmetic and Logic Instructions

  2. Introduction • arithmetic instruction : • addition, subtraction, multiplication, division, comparison, negation, increment, decrement • logic : • AND, OR, EX-OR, shifts, rotates, logical comparison(TEST) • 386~ : • XADD(exchange & add), SHRD(shift right double precision), SHLD, bit tests, bit scans • string instruction : • SCANS, CMPS Ch.5 Arithmetic & Logic Instructions

  3. 5-1 Addition, Subtraction, and Comparison • addition : • ADD, addition with carry(ADC), INC • ADD : table 5-1 • not allowed : memory-to-memory, segment reg. • register addition • EX. 5-1 : AX ← AX + BX + CX + DX • arithmetic, logic instructions execute : • change sign, zero, carry, auxiliary carry, parity, overflow flag bits in flag register Ch.5 Arithmetic & Logic Instructions

  4. Table 5-1 • Table 5-1 Ch.5 Arithmetic & Logic Instructions

  5. Register Addition • EX. 5-1 : AX ← AX + BX + CX + DX Ch.5 Arithmetic & Logic Instructions

  6. Immediate Addition • EX. 5-2 : 8-bit immediate addition 0001 0010 + 0011 0011 0100 0101 • flags change as follows : • Z = 0 (result not zero), C = 0 (no carry), • A = 0 (no half-carry), S = 0 (result positive), • P = 0 (odd parity), O = 0 (no overflow) Ch.5 Arithmetic & Logic Instructions

  7. Memory-to-Register Addition • EX. 5-3 : add two consecutive bytes of data, stored at data segment offset locations NUMB and NUMB+1, to AL Ch.5 Arithmetic & Logic Instructions

  8. Array Addition • EX. 5-4 : add contents of byte array elements 3,5,7 Ch.5 Arithmetic & Logic Instructions

  9. Increment Addition • INC : adds 1 to a reg. or a memory location, except a segment reg. (Table 5-2) • indirect memory increments : size of data must be described by using BYTE, WORD, DWORD PTR • EX. 5-6 : modify ex. 5-3 • increment instruction : not affect carry flag bit • used to point to next memory element in a byte-sized array of data only • word-sized data : ADD DI,2 • doubleword-sized data : ADD DI,4 Ch.5 Arithmetic & Logic Instructions

  10. Increment Addition • Table 5-2 Ch.5 Arithmetic & Logic Instructions

  11. Increment Addition • EX. 5-6 : modify ex. 5-3 Ch.5 Arithmetic & Logic Instructions

  12. Addition-with-Carry • ADC : add carry flag(C) bit to operand data • Table 5-3 Ch.5 Arithmetic & Logic Instructions

  13. Addition-with-Carry • Fig. 5-1 : 8086~286, add 32-bit no.s • F Ch.5 Arithmetic & Logic Instructions

  14. Addition-with-Carry • EX. 5-7 : BX:AX ← BX:AX + DX:CX Ch.5 Arithmetic & Logic Instructions

  15. Addition-with-Carry • EX. 5-8 : add two 64-bit no.s • EBX:EAX ← EBX:EAX + EDX:ECX Ch.5 Arithmetic & Logic Instructions

  16. Subtraction • SUB, subtraction with borrow(SBB), DEC • SUB : table 5-4 • not allowed : memory-to-memory, segment reg. • subtraction instruction : affect flag bits • register subtraction : • EX. 5-9 : BX ← BX - CX - DX Ch.5 Arithmetic & Logic Instructions

  17. Subtraction • Table 5-4 Ch.5 Arithmetic & Logic Instructions

  18. Immediate Subtraction • EX. 5-10 : immediate subtraction(DEH=22H-44H) Ch.5 Arithmetic & Logic Instructions

  19. Decrement Subtraction • DEC : subtract 1 from a reg. or content of memory location, except a segment reg. (Table 5-5) • indirect memory decrements : size of data must be described by using BYTE, WORD, DWORD PTR • subtract-with-borrow(SBB) : subtract carry flag(C) bit from operand data (Table 5-6) • Fig. 5-2 : 32-bit no. in 16-bit reg.s(EX. 5-11) Ch.5 Arithmetic & Logic Instructions

  20. Decrement Subtraction • Table 5-5 Ch.5 Arithmetic & Logic Instructions

  21. Subtract-with-Borrow • Table 5-6 Ch.5 Arithmetic & Logic Instructions

  22. Subtract-with-Borrow • Fig. 5-2 Ch.5 Arithmetic & Logic Instructions

  23. Comparison • CMP : • subtraction that changes only flag bits • destination operand never changes • useful for checking the entire contents of a reg. or a memory location against another value • followed by a conditional jump instruction, which tests the condition of flag bits • Table 5-7 : comparison instruction • not allowed : memory-to-memory, segment reg. Ch.5 Arithmetic & Logic Instructions

  24. Comparison • Table 5-7 : comparison instruction Ch.5 Arithmetic & Logic Instructions

  25. Comparison • EX. 5-12 : contents of AL are compared with 10H • conditional jump instruction • JA(jump above), JAE(jump above or equal) • JB(jump below), JBE(jump below or equal) Ch.5 Arithmetic & Logic Instructions

  26. 5-2 Multiplication, and Division • multiplication : • perform on bytes, words, doublewords • can be signed integer(IMUL), unsigned integer(MUL) • double-width product • Pentium ~ : special circuitry that perform one clock • O, C flag bits change : produce predictable outcomes • 8-bit multiplication, if MS 8 bit of result are 0 : C=O=0 • Result : 8-bit wide(C=0) or 16-bit wide(C=1) • 16-bit multiplication, if MS 16 bit of result are 0: C=O=0 • 32-bit multiplication, if MS 32 bit of result are 0: C=O=0 Ch.5 Arithmetic & Logic Instructions

  27. 8-bit Multiplication • multiplicand : always in AL whether signed,unsigned • multiplier : any 8-bit reg. or any memory location • multiplication instruction : one operand because it always multiplies operand times AL • Ex. MUL BL : AX ← AL  BL • EX. 5-13 : DX ← BL  CL Ch.5 Arithmetic & Logic Instructions

  28. 8-bit Multiplication • signed multiplication : • if positive : product is in true binary form • if negative : in 2’s complement form Ch.5 Arithmetic & Logic Instructions

  29. 16-bit, 32-bit Multiplication • 16-bit multiplication ; DX:AX ← AX multiplier • 32-bit ; EDX:EAX ← EAX multiplier Ch.5 Arithmetic & Logic Instructions

  30. A Special Immediate 16-bit Multiplication • 8086/88 : not perform immediate multiplication • 80186~ : can do so by using a special version • immediate 16-bit multiplication : three operand • limit : signed multiplication, 16-bit wide product(result) • 1st operand : 16-bit destination register • 2nd operand : register or memory location that contains 16-bit multiplicand • 3rd operand : 8-bit or 16-bit immediate data as multiplier • Ex. IMUL CX, DX, 12H • if immediate data is 8-bit : sign-extend into 16-bit no. before multiplication occurs Ch.5 Arithmetic & Logic Instructions

  31. Division • division : • perform on bytes, words, doublewords • can be signed integer(IDIV), unsigned integer(DIV) • double-width dividend • no immediate division • two different types of errors : µ generate interrupt • an attempt to divide by zero • a divide overflow : when a small no. divide into a large no. • ex. AL ← 1500H=AX(3000H)/2 Ch.5 Arithmetic & Logic Instructions

  32. 8-bit Division • 8-bit division : • 16-bit dividend : AX • divisor : 8-bit reg. or memory location • AL : quotient, AH : remainder • signed division : • quotient : positive or negative • remainder : always assume the sign of the dividend, always an integer • Ex. AX=0010H(+16), BL=FDH(-3) • IDIV BL : AX=01FBH; AL=FBH(-5), AH=01 • Ex. AX=FFF0H(-16), BL=03H(+3) • IDIV BL : AX=FFFBH; AL=FBH(-5), AH=FFH(-1) Ch.5 Arithmetic & Logic Instructions

  33. 8-bit Division • 8-bit dividend, 8-bit divisor : extend 16-bit dividend • unsigned no. : zero-extended(MOVZX:386~,AH←0) • signed no. : sign-extended(MOVSX : 386~, CBW) Ch.5 Arithmetic & Logic Instructions

  34. EX. 5-14, 15 • EX. 5-14 : unsigned byte no.s NUMB, NUMB1 • EX. 5-15 : signed byte no.s NUMB, NUMB1 Ch.5 Arithmetic & Logic Instructions

  35. 16-bit Division • 16-bit division : • 32-bit dividend : DX:AX • divisor : 16-bit reg. or memory location • AX : quotient, DX : remainder Ch.5 Arithmetic & Logic Instructions

  36. 16-bit Division • 16-bit dividend, divisor : extend 32-bit dividend • unsigned no.: zero-extended(MOVZX:386~, DX←0) • signed no. : • EX. 5-16 : division two 16-bit signed no.s • AX(-100)/CX(+9) : sign-extended DX • Q : AX = -11, R : DX = -1 Ch.5 Arithmetic & Logic Instructions

  37. 32-bit Division • 32-bit division : 80386~ • 64-bit dividend : EDX:EAX • divisor : 32-bit reg. or memory location • EAX : quotient, EDX : remainder • signed extended : CDQ(convert dword to quadword) Ch.5 Arithmetic & Logic Instructions

  38. The Remainder • remainder : used to round, dropped to truncate • unsigned : • round : remainder compared with half divisor to decide whether to round up quotient • convert to a fractional remainder • EX. 5-17 : doubles remainder, compares with divisor Ch.5 Arithmetic & Logic Instructions

  39. 5-3 BCD and ASCII Arithmetic • BCD, ASCII : accomplished by instruction that adjust the numbers for BCD, ASCII arithmetic • BCD arithmetic : packed BCD(2 digit/byte) • DAA(decimal adjust after addition) : follow ADD, ADC to adjust the result into a BCD result • if AL · 0F > 9 or AF = 1 then AL ← AL + 6 ; AF ← 1 • if AL > 9F or CF = 1 then AL ← AL + 60 ; CF ← 1 • DAS(decimal adjust after subtraction) : follow SUB, SBB to adjust the result into a BCD result • if AL · 0F > 9 or AF = 1 then AL ← AL - 6 ; AF ← 1 • if AL > 9F or CF = 1 then AL ← AL - 60 ; CF ← 1 Ch.5 Arithmetic & Logic Instructions

  40. EX. 5-19 • DAA, DAS : function only with AL(2 BCD digit) • EX. 5-19 : add BCD no.s(CX ← BX + DX) Ch.5 Arithmetic & Logic Instructions

  41. EX. 5-20 • EX. 5-20 : subtract BCD no.s(CX ← BX - DX) Ch.5 Arithmetic & Logic Instructions

  42. ASCII Arithmetic • ASCII-coded no. : 30H-39H(0-9) • ASCII arithmetic : unpacked BCD • AAA(ASCII adjust after addition) : • if AL · 0F > 9 or AF = 1 • then AL ← AL + 6 ; AH ← AH + 1 ; AF ← 1 ; CF ← AF ; AL ← AL · 0F • AX : unpacked BCD ← AL : binary • AAS(ASCII adjust after subtraction) : • if AL · 0F > 9 or AF = 1 • then AL ← AL - 6 ; AH ← AH – 1 ; AF ← 1 ; CF ← AF ; AL ← AL · 0F • AX : unpacked BCD ← AL : binary Ch.5 Arithmetic & Logic Instructions

  43. ASCII Arithmetic • AAM(ASCII adjust after multiplication) : follow multiplication instruction after multiplying two one-digit unpacked BCD no.s • AH ← AL / 0AH ; AL ← remainder • AX : unpacked BCD ← AL :binary(63H=99) • AAD(ASCII adjust before division) : appear before a division • AX : contain a two-digit unpacked BCD no. before executing • AL ← (AH * 0AH) + AL ; AH ← 0 • AL : Binary ← AX : unpacked BCD Ch.5 Arithmetic & Logic Instructions

  44. EX. 5-21, 22 • EX. 5-21 : add ASCII no.s 31H, 39H(1+9) • EX. 5-22 : 72/9=8, AX=0048H ← 0702H Ch.5 Arithmetic & Logic Instructions

  45. EX. 5-23, 24 • EX. 5-23 : AX = 0205H ← 0019H = 05 * 05 • EX. 5-24 : four digit ASCII ← AX(16-bit binary) Ch.5 Arithmetic & Logic Instructions

  46. EX. 5-25 • EX. 5-25 : display decimal on video display using DOS 21H function AH = 02H Ch.5 Arithmetic & Logic Instructions

  47. 5-4 Basic Logic Instructions • AND, OR, EX-OR, NOT, TEST, NEG : • affect flag bits, CF ← 0, OF ← 0 • AND operation : Fig. 5-3 Ch.5 Arithmetic & Logic Instructions

  48. AND Instructions • AND gate(7408):40c, AND instruction(ROM):1/100 • AND instruction : mask operation • masking : task of clearing a bit in a binary no.(fig.5-4) • not allow memory-to-memory, segment reg. • EX. 5-26 : convert ASCII to BCD using AND Ch.5 Arithmetic & Logic Instructions

  49. Table 5-14 • Table 5-14 Ch.5 Arithmetic & Logic Instructions

  50. OR Instructions • OR operation(inclusive-OR function) : Fig. 5-5 • quad 2-input OR gate(7432) : 40c • OR instruction(ROM) : 1/100c Ch.5 Arithmetic & Logic Instructions

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