The recent history and current state of the linac control system
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The recent history and current state of the linac control system. Tom Himel Dec 1, 2010. Outline. Why you need to know the history The SLC control system Phase I of the upgrade for LCLS. Why you need to know the history.

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Outline system

  • Why you need to know the history

  • The SLC control system

  • Phase I of the upgrade for LCLS

Why you need to know the history
Why you need to know the history system

  • You need to know what we are upgrading from and what we could clone if we chose to.

  • It helps to know why we are upgrading to see if we have chosen the right solution

In the beginning
In the beginning system

  • God created the heavens and the earth

  • On the eighth day (AKA early 1980’s) he created the SLC control system.

  • God looked at everything he had made, and he found it very good[1].

[1] after hundreds of person-years of effort by descendents of those created on day five.

Block diagram of slc control system
Block diagram of SLC control system system

VMS host


Multibus I micro: CW01

Multibus I micro: LI00

Multibus I micro: LI30

Serial CAMAC

CAMAC crate

CAMAC crate

Video screens

CAMAC crate

CAMAC crate

Description of slc control system
Description of SLC control system system

  • Central host VMS system runs all high level apps, operator consoles, and has central fast DB.

  • Multibus-I micros (originally 8086 CPUs, upgraded to 386 and 486) control everything in their sector.

  • Above connected with SLCnet, a proprietary polled network with cable TV as its physical media and the VMS interface as the master polling device. Ethernet was young and did not work well enough at that time.

Description of slc control system1
Description of SLC control system system

  • Each micro controls several CAMAC crates via a proprietary serial CAMAC link.

  • Both commercial and proprietary CAMAC modules readout and control all hardware

    • 32 channel autoranging ADC for thermocouples, small magnet readout etc.

    • 16 channel DACs for small magnet control, profile monitor lamp brightness etc.

    • 1 channel Power supply controller couple to external chassis for analog and interlock control of large power supplies

    • BPM modules (several flavors)

    • 16 channel Programmable delay units for triggers

    • 32 channel digital input and output modules

    • 1 channel Klystron controller with 8088 CPU coupled to external chassis (MKSU).

Expansion to pep ii
Expansion to PEP-II system

  • Mainly expanded the SLC control system with some upgrades

    • New micros communicated with VMS via ethernet

    • New more precise power supply controllers got digital information from the micro via bitbus

  • New types of functionality (longitudinal feedback and CW RF) were implemented in EPICS

  • Cross-system SLC high level apps (correlation plots, multi-knobs, configs, history plots …) were made to handle EPICS items

The recent history and current state of the linac control system
LCLS system

  • All new devices are controlled with EPICS

  • New high level applications were written (mainly in Matlab) to control all the new EPICS devices and extended to control most of the old SLC linac devices

  • LI20-30 linac magnets and BPMS were upgraded to EPICS hardware.

  • Klystrons, timing, vacuum, analog and digital status are all still in the SLC control system.

Upgrading of the slc control system
Upgrading of the SLC control system system

  • In 2008 we decided to upgrade the old control system

    • Was significant source of downtime

    • Virtually everyone knowledgeable in VMS, FORTRAN or CAMAC had retired or been laid-off.

  • Decided to do it in two phases:

    • Phase I gets rid of VMS, SLCnet and the micros and is software dominated.

    • Phase II replaces CAMAC with modern hardware and is hardware dominated

  • Phase I is almost done

  • Phase II system architecture and implementation plan is being reviewed today.

Controls downtime causes1
Controls downtime causes system

  • There is about an even split between micro and CAMAC downtime.

  • The timing downtimes are with the old timing system, not the EVG/EVR system.

  • We’ve also had significant (multi-hour) downtimes due to SLCnet interface to the VMS computer and the old MPS system that luckily occurred during scheduled MD or maintenance and so don’t count in above statistics.

  • Can’t count on luck. Need to fix.

Phase i upgrade block diagram
Phase system I upgrade block diagram

VMS host

Archiver server

Cmlog server

Operator console



Multibus I micro: LI00

Multibus I micro: LI19



Serial CAMAC

Serial CAMAC

CAMAC crate

CAMAC crate

CAMAC crate

CAMAC crate

CAMAC crate

CAMAC crate

CAMAC crate

CAMAC crate

Phase i upgrade
Phase I upgrade system

  • Add 1 VME EPICS IOC per sector connected with new Ethernet network

  • Build VME serial CAMAC interface (PSCD) that uses commercial hardware serial IO card with our firmware

  • Produce all necessary CAMAC drivers, device support, EPICS DB, displays, and high level apps

  • Test it all without impacting LCLS

  • Switch over on a maintenance day

State at end of january 2011
State at system end of January 2011

  • Phase one upgrade will be running in LI20-30.

    • VMS and SLCnet and micros will NOT be needed for LCLS

    • The 360 Hz timing information will be distributed via the new EVG/EVR system, but the nanosecond level timing will still come from the old distribution and PDUs.

    • Will still have CAMAC. This and timing expected to be largest contributors to controls downtime

    • We will be scrambling to finish needed but not absolutely essential software tasks.

  • Sectors 0-19 (and Damping rings and e+ source) will still be using SLC control system and will shortly be used to run FACET.