1 / 40

Feature-level Compensation & Control

F LCC. Feature-level Compensation & Control. Sensors & Control April 5, 2006. A UC Discovery Project. Year II Milestones – 1.27.2005 through 1.26.2006. Integrated sensor platform development 2 (M26 YII.16 ) Gather CMP and etching rate data and correlate with process variables.

honora
Download Presentation

Feature-level Compensation & Control

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. FLCC Feature-level Compensation & Control Sensors & Control April 5, 2006 A UC Discovery Project

  2. Year II Milestones – 1.27.2005 through 1.26.2006 • Integrated sensor platform development 2 (M26 YII.16) • Gather CMP and etching rate data and correlate with process variables. • Complete preliminary experimental study for CD non-uniformity reducing across the litho-etch sequence (M27 YII.17) • Assess predictive capability of mode, and build optimizing software to compute optimal changes in control parameters. Provide proof of concept test of CD non-uniformity reduction scheme based on direct CD metrology. • Zero-footprint Optical Metrology Wafer (Milestone Added, YII.18) • Evaluate and calibrate dielectric thickness monitoring (resolution, sensitivity, and stability). • Metal etch endpoint and pre-endpoint (<50nm) detection and monitoring. Testing the prototype metrology wafer in vacuum environment. • Using Spatial CD Correlation in IC Design (M30 Major Revision, YII.19) • Initial experiments on test structures and measurement for extracting spatial correlation characteristics. • Aerial Image Metrology (M31 YII.20) • Integrate prototype transducer for use and deployment on a silicon wafer. FLCC - Sensors and Control

  3. Year III Milestones – 1.27.2006 through 1.26.2007 • Zero-footprint Optical Metrology Wafer (SENS Y3.1) • Modeling and demonstration of metrology wafer for detection and thin-film roughness monitoring. Initiate prototyping of wireless data acquisition/transmission and evaluate performance with measurements made in experimental systems. • Complete experimental study for CD non-uniformity reducing across the litho-etch sequence (SENS Y3.2) • Experimentally verify DI & FI CDU improvement using model based optimal control of PEB with various CD objective functions. • Using Spatial CD Correlation in IC Design (SENS Y3.3) • Develop test structures and measurement plans for extracting spatial correlation characteristics. • Aerial Image Metrology (SENS Y3.4) • Complete the micro-assembly of the commercial CCD with the Si carrier wafer. Integrate the aperture mask and the CCD arrays. FLCC - Sensors and Control

  4. Zero-footprint Optical Metrology Wafer – Prototyping and Modeling Student: Vorrada Loryuenyong Faculty: Prof. Nathan Cheung UC Berkeley Milestones • Testing the prototype metrology wafer in vacuum environment • Demonstration of metrology wafer for detection and metal endpoint monitoring, aimed for chemical mechanical polishing (CMP) process FLCC - Sensors and Control

  5. Current Accomplishments • To optimize design of the zero-footprint optical metrology wafer, window material effects, LED spectral distribution effects, and incidence angle effects have been quantitatively investigated. • Metal endpoint detection using wet etch has been demonstrated for Cr and Cu. • Time progression of Cu etching near end-point shows multiple mechanisms • CMP Metal etch endpoint mapping set up is in progress. Initial results indicate method can distinguish various slurries. 2006 Main Objectives • Calibrate metal thickness and slurry optical properties • Monitoring of Metal endpoint and pre-endpoint (<50nm) mechanisms for CMP • Complete automatic data acquisition system FLCC - Sensors and Control

  6. Feasibility Demonstration Unit Fabrication FLCC - Sensors and Control

  7. Choice of Optical Window Materials Si3N4 Optical window SiO2 Optical window Simulation Condition: Vacuum ambient, Cu thin film, window thickness 649nm, LED peak wavelength 463nm, the refractive index of Cu: n=1.16, k=2.43. *D.L. Windt, IMD Software. • Signal sensing depends greatly on incident angle. • Si3N4 optical window shows more signal variation before end-point. FLCC - Sensors and Control

  8. Pressure ~ 1 atm a a Top view Optical Window Mechanical Testing Evaluate maximum window size that can withstand a differential pressure of 1 atm 643 nm Si3N4 optical window Vacuum ambient Si Air Si Test structure BROKEN Si3N4 layer • Fracture resistance of optical window to differential pressure depends on the window dimension and thickness. • 643 nm Si3N4 optical window dimension up to 1.0 × 1.0 mm2 can withstand the vacuum ambient. 1.0 × 1.0 mm2 1.1 × 1.1 mm2 Si3N4 layer Si3N4 layer 0.9 × 0.9 mm2 0.4 × 0.4 mm2 Top view FLCC - Sensors and Control

  9. 0.30 0.25 Cr CR-7 0.20 0.15 0.10 0.05 0.00 0 20 40 60 Etching Results – Cr Endpoint Detection h = 40-50nm Pre-endpoint region [Signal (h) - Signal (h=0)] / Signal (h=0) Experimental Condition: Sputtering deposition, etching solution: Cyantek CR-7 (Perchoric based), nitride window thickness 649±10nm + 500µm quartz slide,LED peak wavelength 463±15nm. h = metal thickness at time t h = 0nm Time, t (s) • t = 0 indicates the point where the optical signal start dropping. • Near end-point average etching rate ~40-50nm/min. FLCC - Sensors and Control

  10. Cu CR-7 h = 50-60nm Pre-endpoint region h = 0nm Etching Results – Cu Endpoint Detection Experimental Condition: Sputtering deposition, etching solution: Cyantek CR-7 (Perchoric based), nitride window thickness 649±10nm, LED peak wavelength 463±15nm. h = metal thickness at time t. • t = 0 indicates the point where the optical signal start dropping. • Near end-point average etching rate ~500-600nm/min. FLCC - Sensors and Control

  11. Effects of the surface condition(e.g. slurry particles and volume) DS030-16 3m-sized diamond suspension* DS002-16 250nm-sized diamond suspension* DS060-16 6m-sized diamond suspension* DS450-16 45m-sized diamond suspension* water Work in Progress: Endpoint Mapping in Chemical Mechanical Polishing • Wafer can distinguish various slurries with no metal • Needs optical data of slurry for model fitting Metrology wafer * Products are commercially available from South Bay Technology. The suspension consists of diamond particles in water with trace amount of proprietary suspending agents. FLCC - Sensors and Control

  12. Integrated Aerial Image Sensor (IAIS) Students: Jing Xue, Kurt Moen Faculty: Costas J. Spanos Dept of EECS, UC Berkeley Accomplishments • Completed first principle simulations and optimized design • Developed two approaches for mechanical assembly FLCC - Sensors and Control

  13. 2006 Objectives • Complete the micro-assembly of the commercial CCD with the Si carrier wafer. Integrate the aperture mask and the CCD arrays (year III milestone: 1,27,2006 – 1,27,2007) • Complete the liquid assembly and polymer assembly to integrating CCD chips to wafer carrier • Complete the aperture mask pattern on CCD chips by e-beam lithography for 193nm/248nm stepper • Complete the aberration analysis to predict the ability of IAIS calibration Future Goals • Package the technology for inclusion into the zero-footprint metrology prototype • Integrate prototype transducer for use and development on a wafer FLCC - Sensors and Control

  14. x Integrated Aerial Image Sensor (IAIS) Concept High spatial frequency aerial image Aperture mask transmission Low spatial frequency detector signal FLCC - Sensors and Control

  15. Mask aperture Photo-detector Poly-silicon mask Φ1 Φ3 Φ2 Φ2 Φ1 Φ3 Substrate p-Si Integrated Aerial Image Sensor (IAIS) Concept Dark contact mask forming a series of spatial frequency shifting apertures. On-wafer photo-detectors to detect the optical signal captured by the aperture mask FLCC - Sensors and Control

  16. Wt wa Wg Wi l Wd a - Si t IAIS Design – Aperture Mask (65nm nodes) FLCC - Sensors and Control

  17. IAIS Design – Aperture Mask (65nm nodes) Pinhole design improves polarization ratio, however transmission efficiency is very low. FLCC - Sensors and Control

  18. Discretize illumination source Mask and projection optics simulation Extract scattering orders at wafer plane Combine partial image to total detector image IAIS aperture mask simulation Annular Illumination: s = 0.89/0.59, NA=0.85, BIM, CD = 65nm Aerial Image and Detector Image Reconstruction : FLCC - Sensors and Control

  19. DefocusModeling Aerial image: 90nm L/S Aerial image: 65nm L/S • Precision of determination of focus plane on the level of 10nm, with Idark=10pA/cm2@25oC, nread=15 electrons, QE = 0.5 * Noise magnified 200 times in the above plots FLCC - Sensors and Control

  20. liquid Si Wafer Holder CCD Aluminum bond pads with FOTS SAM (vapor phase) Sacrificial layer Liquid evaporation liquid Liquid evaporation Si Wafer Holder CCD front side Sealing Material liquid Sealing Material Removal of sacrificial layer IAIS Assembly – Method I Emmanuel P. Quévy, Roger Howe, Tsu-Jae King, MEMS 2006 FLCC - Sensors and Control

  21. Bond pads q = 119.1o q = 64o FOTS on Al SiO2 IAIS Assembly CCD dummy chip bond pads SiO2 passivation layer fluorinated organosilane monolayer (FOTS) on Al (oxide) bond pads Wafer carrier backside alignment holes Contact angle measurement FLCC - Sensors and Control

  22. W1 t1 t a. W2 W3 t3 b. W2 Wafer holder SiO2 DSP Si wafer Sacrificial layer CCD chip Sealing material IAIS Assembly – Method II FLCC - Sensors and Control

  23. Spatial Modeling of Gate Length Variation Students: Paul Friedberg, Willy Cheung Faculty: Costas J. Spanos Dept of EECS, UC Berkeley Accomplishments • Completed first test pattern design and received first silicon (currently being debugged and tested) • Completed macro modeling that accelerated Monte Carlo framework • Used accelerated simulation for better modeling and decomposition of spatial correlation. FLCC - Sensors and Control

  24. 2006 Main Objective • Milestone M30: Spatial CD Correlation in IC Design • Design analytical Monte Carlo simulation framework constructed using macro models • Investigate effects of spatial variation (based on historical study) on circuit performance variability using analytical Monte Carlo framework • Deploy new test structures to explore short-range (0.2-200 micron) spatial variability • Submit additional test structures for manufacture; gather measurements from fabricated test structures • Incorporate new results into Monte Carlo framework 2006 Project Timeline • May 1, 2006: Submit revised test structure design to foundry. • June 1, 2006: Evaluate impact of preliminary micron-scale gate-length spatial variation results on circuit performance variability using Monte Carlo Framework. • August 1, 2006: Submit additional test structure designs for spatial characterization of threshold voltage, oxide thickness, and LER to foundry. • Fall, 2006: Complete characterization of poly CD spatial variation. FLCC - Sensors and Control

  25. Spatial Correlation Calculation Standardize each CD measurement, using wafer-wide distribution: For each spatial separation considered, calculate correlation r among all within-field pairs of points using: Perform analysis for both residual and original CD distributions: FLCC - Sensors and Control

  26. mm-scale spatial correlation mostly due to systematic variation. μm-scale correlation may be significant, needs to be investigated. Correlation Structure of “Random” Variation • “Random” variation has slight correlation structure at short end of separation distance range FLCC - Sensors and Control

  27. Analytical MC Simulation Framework • For enhanced-speed simulation, recast Monte Carlo, SPICE-based framework as analytical, Matlab-based framework • Macro model for NAND2 delay propagation: • Using OLS regression, models are fit for delay & output slew for both rising and falling input signals • All modeled coefficients shown to be statistically significant • Model fit (R2) ranges from 0.94 to 0.99 • Accuracy ~ 2% FLCC - Sensors and Control

  28. Statistical CD Model Description • Does the completeness of the statistical model of CD variation used in MC simulation lead to significantly different delay variability predictions? FLCC - Sensors and Control

  29. Effect of Simulated Process Control • For various critical path lengths: Normalized Delay Variability % Variation Reduction FLCC - Sensors and Control

  30. Test Structure for Mid-Range CD Variation • 2x10 Probe frame: 100um x 100um pads, 150um pitch • Dense ELM base case test structure: • Currently being “debugged” and measured • Based on preliminary analysis, structures will be re-designed and submitted for second manufacturing run (May ’06) FLCC - Sensors and Control

  31. Variant ELM Submodules Dummy lines used to extend measurable range, explore effects of pattern density and regularity FLCC - Sensors and Control

  32. CD Uniformity Control Across Litho-etch Sequence Student: Qiaolin (Charlie) Zhang Faculty: Kameshwar Poolla, Costas Spanos Depts of ME and EECS, UC Berkeley Accomplishments • Designed and (almost) completed full experiment at AMD/SDC • Control algorithm developed and tested step by step • Currently analyzing results while waiting for the last confirmation etch step. FLCC - Sensors and Control

  33. 2006 Main Objectives • Complete preliminary experimental study for CD uniformity improvement across the litho-etch sequence (M27 YII.17) • Assess predictive capability of mode, and build optimizing software to compute optimal changes in control parameters. • Provide proof of concept test of CD non-uniformity. • reduction scheme based on direct CD metrology. • Official milestone (SENS Y3.2) : • Complete experimental study for CD non-uniformityreducing across the litho-etch sequence • Experimentally verify DI & FI CDU improvement using model based optimal control of PEB with various CD objective functions. Future Goals FLCC - Sensors and Control

  34. Wafer Litho Etch Processing Tool Poor Across-Wafer CD Uniformity How can we improve the across-wafer CDU and what is the maximum CDU we can achieve? The Problem FLCC - Sensors and Control

  35. Exposure PEB / Develop Etch temperature dose He pressure Optimizer Wafer-level CD Metrology Scatterometry/CDSEM Our Approach • Compensate for systematic across-wafer CD variation sources across the litho-etch sequence using all available control authority : • Exposure step: die to die dose • PEB step: temperature of multi-zone bake plate • Etch: backside pressure of dual-zone He chuck 6 3 1 5 7 2 4 multi-zone bake plate FLCC - Sensors and Control

  36. Develop Inspection (DI) CDU Control • DI CD is a function of zone offsets • Seen as a constrained nonlinear programming problem • Minimize • Subject to: FLCC - Sensors and Control

  37. Final Inspection (FI) CDU Control • Across-wafer FI CD is function of zone offsets • Plasma etch signature: plasma etch bias signature • Minimize: • Subject to: FLCC - Sensors and Control

  38. Bias DI FI σ=1.39 σ=1.00 P250_1-1 σ=2.12 σ=1.63 σ=1.27 P600_1-2 σ=2.08 σ=2.17 P800_1-4 σ=1.08 σ=1.78 Experimental Data from State of the Art Litho and Etch ToolsBaseline Final Inspection, Develop Inspection, Bias Signature (Plate A) CD data is presented in relative scale FLCC - Sensors and Control

  39. Initial Results of Final Inspection CDU Verification Experiment Measured Baseline FICD Simulated Optimal FICD 58% CDU improvement expected σ=1.00 σ=0.42 Measured PEB Temperature Adjustment Simulated PEB Temperature Adjustment PEB Adjustment Error FLCC - Sensors and Control

  40. Desired DICD Simulated DICD Bias Measured DICD(wf2) DICD control error(wf2) Measured DICD(wf1) DICD control error(wf1) σ=0.93 σ=0.86 Initial Results of FI CDU Verification Experiment FLCC - Sensors and Control

More Related