slide1 n.
Download
Skip this Video
Loading SlideShow in 5 Seconds..
Computing Machinery Chapter 7: Register Transfers PowerPoint Presentation
Download Presentation
Computing Machinery Chapter 7: Register Transfers

Loading in 2 Seconds...

play fullscreen
1 / 20

Computing Machinery Chapter 7: Register Transfers - PowerPoint PPT Presentation


  • 96 Views
  • Uploaded on

Computing Machinery Chapter 7: Register Transfers. A Register Transfer. Immediate and Direct Register Transfer Modes. Immediate Mode - In the immediate mode, a literal data value (constant) is loaded into memory or a register. For instance, the value 1234 is loaded into register R .

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about 'Computing Machinery Chapter 7: Register Transfers' - hayley


An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
slide1

Computing Machinery

Chapter 7: Register Transfers

slide3

Immediate and Direct Register Transfer Modes

Immediate Mode - In the immediate mode, a literal data value (constant) is loaded into memory or a register. For instance, the value 1234 is loaded into register R

Direct Addressing Mode - In direct addressing mode, the value on the right-hand side (rhs) of the register transfer refers to the address (location) in memory of the value being loading into the register. The value at memory address 1234 is loaded into R

alternatively the data in register R is transferred to Memory address 1234 by,

slide4

Register Addressing Modes

Register Indirect Addressing - We can also refer to an address as a variable such as in another register. In this example, the contents of memory at an address stored in register R2 is loaded into register R1,

One of the applications made simpler by this addressing mode is stepping through an array of values stored in a contiguous region of memory.

where the second register transfer refers to incrementing the value contained in R2. The third register transfer could be replaced with a loop back to the first register transfer using an algorithmic state machine model.

slide5

Indexed Transfer Modes

Indexed Addressing Mode - In this data transfer mode, the address in memory is determined by a combination of the contents of a register and a constant value.

The address of the value loaded into R1 is the contents of R2 plus the value 1234. In this example, we may be referring to the 1234th element of an array of values in memory starting at address R2.

Indirect Addressing - Also called memory indirect addressing, this mode uses one value in memory as an address to locate the address of another value in memory. Load into R1 the value located in memory at the address stored in memory at address 1234,

slide6

Operations on Registers

Three-Register Operations

Two-Register Operations

Single-Register Operations

Assembly Register Transfer Operation

ADD R1, R2, R3

Assembly Register Transfer Operation

ADD R1, R2

Assembly Register Transfer Operation

ADD R

slide7

Register Operations and Assembly Instructions

LDAR3load ACC with the value in R3

ADDR2add the value of R2 to the value in ACC

STAR1store the value in ACC into R1

slide8

Basic Arithmetic Operations

n-bit left shift

n-bit right shift

slide9

Logical Operations

Addr Class Bits for Subnet Mask Subnet Mask .

Class A 11111111 00000000 00000000 00000000 255. 0. 0. 0

Class B 11111111 11111111 00000000 00000000 255.255. 0. 0

Class C 11111111 11111111 11111111 00000000 255.255.255. 0

slide11

Algorithmic State Machine

Algorithmic state machines are less formal than FSMs and are easier to understand. They are like flowcharts with a few added rules and restrictions. Their principal value is as an alternative to FSMs for designing sequential circuits.

Rami Abielmona, Advanced Topic Lecture #3, ASM Design, SMRLab – SITE – University of Ottawa, CEG 3151 – High Level Computer Systems Design, May 21, 2003

slide12

ASM Design Process

Step 1: Algorithm Description - Create an algorithm that describes the operation of the circuit being designed.

Step 2: ASM Chart - Convert the algorithm into a graphical representation.

Step 3: Datapath - Design a datapath based on the ASM chart.

Step 4: Detailed ASM Chart - Use the datapath to complete the ASM chart.

Step 5: Control Logic - Design the control logic based on the detailed ASM chart.

slide13

Algorithm Description

section_0

A ← Input1;

B ← Input2;

Count ← Input3;

count_loop

if (Count > 0) (goto section_1);

else (goto section_2);

section_1

A ← A + B;

Count ← Count - 1;

(goto count_loop);

section_2

If (A > 25) Output ← A;

(goto section_2);

Rami Abielmona, Advanced Topic Lecture #3, ASM Design, SMRLab – SITE – University of Ottawa, CEG 3151 – High Level Computer Systems Design, May 21, 2003

slide14

ASM Chart

Rami Abielmona, Advanced Topic Lecture #3, ASM Design, SMRLab – SITE – University of Ottawa, CEG 3151 – High Level Computer Systems Design, May 21, 2003

slide15

Datapath

Just as the ASM chart shows the flow of control signals, the datapath emphasizes the flow of data. The datapath diagram displays each register (and other memory elements), their inputs, outputs, and operations on them in order of execution.

slide16

Detailed ASM Chart

The Detailed ASM Chart includesthe control signals and conditionals defined in the datapath in our ASM chart. In building the detailed ASM chart, we need to follow certain rules and protocols:

slide18

Conversion Transformation Process

Ali Tehrani, A Systematic Approach to Logic Design, Chapter 4, Conestoga College Electronics Engineering Technology, Reconfigurable Computing, Course Notes, Winter 2005.

slide20

Summary

Register Transfers define the operations of computing hardware circuits that move data instructions between memory, ALU and registers.

The ad-hoc sequential design methods we have covered in Chapter 5 of the textbook can be codified into a formal procedure.

There are a number of proprietary design tools that are based on ASMs such as Verilog, and VHDL (Very High Definition Language) but these tools are not necessary to use ASMs effectively. There are many excellent books and other references for ASMs.