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JasperGold for Targeted ROI

JasperGold for Targeted ROI . JasperGold solutions portfolio delivers competitive advantage across the spectrum of SoC design applications: Architectural analysis RTL design and debug Verification, including regression test and low power analysis

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JasperGold for Targeted ROI

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  1. JasperGold for Targeted ROI • JasperGold solutions portfolio delivers competitive advantage across the spectrum of SoC design applications: • Architectural analysis • RTL design and debug • Verification, including regression test and low power analysis • Chip integration and software programmers’ model • Silicon debug • JasperGold is for: • Architects • RTL designers • Verification engineers and formal experts • Silicon teams

  2. JasperGold Targeted ROI and Applications Summary

  3. Architectural and RTL Design and Debug "JasperGold's user interactive Design Tunneling enable the tool to solve previously intractable block-level proofs by directing the engines to consider only the logic which is relevant to the problem."   ProsenjitChatterjee, NVIDIA Corporation

  4. Proofs of Critical Functionality / Verification "Jasper has significantly improved the scalability of formal model checking. JasperGold Verification System's interactive use-model allows formal model checking to run on larger, more complex designs."   Shrenik Mehta, Sun Microsystems

  5. Low Power Verification “On the wireless side, the big focus is low power. That introduces the complexity of having to deal with low-power techniques. There are many power domains and many voltage domains…All of that needs to be not only designed, but verified. Making sure that none of the power modes are incompatible with each other is one of the big challenges.” Philippe Magarshack , ST Microelectronics

  6. SoC Integration "After using several competing products, Qualcomm selected Jasper as our formal verification provider of choice because of their superior technology and solutions-oriented applications support. We are now deploying JasperGold across design and verification teams worldwide to deliver higher quality in the industry’s most highly integrated wireless devices.“ J. Scott Runner, Qualcomm

  7. Silicon Debug “In post-silicon debug, a set of observed events or conditions describes a failure scenario... Modern formal verification methods are especially adept at finding counterexamples to properties, and can often do so efficiently in large state spaces. “ C. Richard Ho, D. E. Shaw Research

  8. JasperGold Leads Industry Deployment JasperGold Technology Deployment • Methodology • Capacity • Visibility • Supported by Jasper Services • Patented formal technology • 12 patents, more pending

  9. Jasper Portfolio of Solutions

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